US4255809A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dual redundant error detection system for counters
Assignee: Individual
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Filing: 1979-11-02
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Granted: 1981-03-10
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Expires: 1999-11-02
Abstract
Abstract A pair of identical multiple stage digital counters receive count advance inputs designating the occurrence of the event being monitored but with the inputs displaced so the counters do not advance simultaneously. Only the upper order stages of the counters are compared so the contents will appear equal at times and different at other times. If the compared counts are different when they should be equal or equal when they should differ, an error is indicated.
Inventors
- 👤 Dale A. Hillman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 13:16
CPC Classifications
H; H03; H03K; H03K21/00; H03K21/40
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
92 words
A method for detecting errors when using a multistage counter as a measuring device by feeding it count advance signals comprising the steps of: a. feeding a count advance input signal into another multistage counter which is displaced from the count advance input signal being fed into the measuring counter so that the counters do not advance simultaneously; b. comparing the contents of the two counters except for at least their lowest order counter stages; and c. counting the instances when the comparison shows a difference and when the comparison shows equality.
Claim 2
Independent Claim
92 words
A method for detecting errors when using a multistage counter as a measuring device by feeding it count advance signals comprising the steps of: a. feeding a count advance input signal into another multistage counter which is displaced from the count advance input signal being fed into the measuring counter so that the counters do not advance simultaneously; b. comparing the contents of the two counters except for at least their lowest order counter stages; and c. counting the instances when the comparison shows a difference and when the comparison shows equality.
Claim 3
Dependent Claim
35 words
The method as described in claim 1 wherein the counting in step c is done when comparing the counters contents after one of the counters has been advanced but before the other has been advanced.
Claim 4
Dependent Claim
30 words
The method as described in claim 1 further including: controlling the counting in step c with the count advance input signal which is fed into one of the multistage counters.
Claim 5
Dependent Claim
112 words
A dual redundant error detection system for a counter comprising: a. a pair of identical multiple stage counters; b. means for feeding counting advance input signals to each of said counters from the same source but displaced from one another so that the counters do not advance simultaneously; c. means for comparing the content of the two counters except for at least the lowest order stages for detecting when the compared contents are equal or different; and d. means responsive to said comparing means for counting when the compared contents are equal and when they are different when one of the counters has been advanced and before the other has been advanced.
Claim 6
Dependent Claim
112 words
A dual redundant error detection system for a counter comprising: a. a pair of identical multiple stage counters; b. means for feeding counting advance input signals to each of said counters from the same source but displaced from one another so that the counters do not advance simultaneously; c. means for comparing the content of the two counters except for at least the lowest order stages for detecting when the compared contents are equal or different; and d. means responsive to said comparing means for counting when the compared contents are equal and when they are different when one of the counters has been advanced and before the other has been advanced.
Claim 7
Dependent Claim
34 words
The error detection system as in claim 4 further including: means for controlling the counting means in d with the count advance input signal which is fed to one of said multiple stage counters.
Claim 8
Dependent Claim
157 words
A measuring system having dual redundance error detection, comprising: a. a first sensor for producing a signal upon occurrence of an event; b. a second sensor displaced from said first sensor for producing a similar signal upon the occurrence of said event; c. a first multistage counter coupled to said first sensor for counting the occurrences of said event; d. a second counter identical to said first counter coupled to said second sensor for counting the occurrences of said event, the content of said second counter being advanced at a different time than the first counter due to the displacement of the second sensor; e. comparator means for comparing the contents of the two counters except for at least the lowest order stages; and f. means for recording when the compared contents are equal and when they are different at the time when one of the counters has been advanced and before the other has been advanced.
Claim 9
Dependent Claim
157 words
A measuring system having dual redundance error detection, comprising: a. a first sensor for producing a signal upon occurrence of an event; b. a second sensor displaced from said first sensor for producing a similar signal upon the occurrence of said event; c. a first multistage counter coupled to said first sensor for counting the occurrences of said event; d. a second counter identical to said first counter coupled to said second sensor for counting the occurrences of said event, the content of said second counter being advanced at a different time than the first counter due to the displacement of the second sensor; e. comparator means for comparing the contents of the two counters except for at least the lowest order stages; and f. means for recording when the compared contents are equal and when they are different at the time when one of the counters has been advanced and before the other has been advanced.
Claim 10
Dependent Claim
24 words
The system as described in claim 6 further including means for controlling the recording means of f with the signal from said first ensor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-03-09 | 1984-09-08 | 1985-03-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-03-09 | 1988-09-08 | 1989-03-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-03-09 | 1992-09-08 | 1993-03-10 | $7700.00 | Window Closed / Lapsed |