Transistor logic tristate output with feedback

Claim 2

In a transistor logic tristate output device of the type comprising an input and an output for binary data signals of high and low potential, pullup element for sourcing current to the output and output load from high potential, pulldown element for sinking current from the output and output load to low potential, phase splitter element coupled at the input to control the pullup and pulldown elements, and an enable gate for sinking current from the elements of the device to afford a high impedance third state at the output when the enable gate is activated, the improvement comprising: means for feedback of a portion of current from any output load to drive the pulldown element and accelerate sinking of current from the output during transition at the output from high to low potential, said means also blocking paths from output to ground through the enable gate when the output is in the high impedance third state, said means for feedback coupled in parallel configuration with the phase splitter element.

Claim 3

A transistor logic tristate output device as set forth in claim 1 wherein is also included the improvement comprising separate and additional means blocking current flow from the output through the device to high potential in the event a higher voltage is applied to the output.

Claim 4

In a transistor logic tristate output device of the type comprising an input and an output for binary data signals of high and low potential, pullup element for sourcing current to the output and output load from high potential, pulldown element for sinking current from the output and output load to low potential, phase splitter element coupled at the input to control the pullup and pulldown elements, and an enable gate for sinking current from the elements of the device to afford a high impedance third state at the output when the enable gate is activated, the improvement comprising: feedback transistor means coupled in parallel with the phase splitter element said feedback transistor means coupled through one way diode means between the output and pulldown element for feedback of current from any output load to accelerate pulldown during transition at the output from high to low potential said feedback transistor means coupled in the device without connection to the enable gate thereby preventing a route from output to ground through the enable gate when the output is in the high impedance third state.

Claim 5

In a transistor logic tristate output device of the type comprising an input and an output for binary data signals of high and low potential, pullup element for sourcing current to the output and output load from high potential, pulldown element for sinking current from the output and output load to low potential, phase splitter element coupled at the input to control the pullup and pulldown elements, and an enable gate for sinking current from the elements of the device to afford a high impedance third state at the output when the enable gate is activated, the improvement comprising: feedback transistor means coupled in parallel with the phase splitter element said feedback transistor means coupled through one way diode means between the output and pulldown element for feedback of current from any output load to accelerate pulldown during transition at the output from high to low potential said feedback transistor means coupled in the device without connection to the enable gate thereby preventing a route from output to ground through the enable gate when the output is in the high impedance third state.

Claim 6

A transistor logic tristate output device as set forth in claim 3 wherein said feedback transistor means is also coupled through one way diode means between the pullup element and the pulldown element to accelerate turnoff of the pullup element to a non-conducting state during transition of the output from high to low potential while preventing a route from output to ground through the enable gate when the output is in the high impedance third state.

Claim 7

A transistor logic tristate output device as set forth in claim 3 wherein is also included diode means coupled between the feedback transistor means and high potential and between the pullup element and high potential for blocking current flow from the output through the device to high potential in the event a voltage higher than the high potential is applied to the output.

Claim 8

In a transistor logic tristate output device of the type comprising an input for receiving binary data signals in the form of high and low potential states, a pullup element comprising transistor means for sourcing current from a high potential when the transistor means is conducting, a pulldown element comprising transistor means for sinking current to a low potential when said transistor means is conducting, phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state of said pullup and pulldown elements for either sourcing or sinking current in accordance with binary data signals at the input, an output coupled between the pullup and pulldown elements for delivering either high or low potential to a load according to whether the pullup or pulldown element is conducting, enable gate means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated, the improvement comprising: feedback transistor means coupled in current mirror configuration with the phase splitter element transistor means, said feedback transistor means coupled through one way diode means to the output and without a direct connection to the enable gate whereby the feedback transistor means accelerates pulldown during transition from the high to low state by feedback of current from any load coupled to the output to drive the pulldown element transistor means to greater conduction during transition from the high to low state while blocking paths to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state.

Claim 9

In a transistor logic tristate output device of the type comprising an input for receiving binary data signals in the form of high and low potential states, a pullup element comprising transistor means for sourcing current from a high potential when the transistor means is conducting, a pulldown element comprising transistor means for sinking current to a low potential when said transistor means is conducting, phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state of said pullup and pulldown elements for either sourcing or sinking current in accordance with binary data signals at the input, an output coupled between the pullup and pulldown elements for delivering either high or low potential to a load according to whether the pullup or pulldown element is conducting, enable gate means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated, the improvement comprising: feedback transistor means coupled in current mirror configuration with the phase splitter element transistor means, said feedback transistor means coupled through one way diode means to the output and without a direct connection to the enable gate whereby the feedback transistor means accelerates pulldown during transition from the high to low state by feedback of current from any load coupled to the output to drive the pulldown element transistor means to greater conduction during transition from the high to low state while blocking paths to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state.

Claim 10

A transistor logic tristate output device comprising: an input for receiving binary data signals in the form of high and low potential states; a pullup element comprising transistor means for sourcing current from a high potential when the transistor means is conducting; a pulldown element comprising transistor means for sinking current to a low potential when said transistor means is conducting; phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state of said pullup and pulldown elements for either sourcing or sinking current in accordance with binary data signals at the input; an output coupled between the pullup and pulldown elements for delivering either high or low potential to a load according to whether the pullup or pulldown element is conducting; enable gate means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated; feedback transistor means coupled in current mirror configuration with the phase splitter element transistor means, said feedback transistor means coupled through one way diode means to the output without direct connection to the enable gate whereby the feedback transistor means accelerates pulldown during transition from the high to low state by feedback of current from any load coupled to the output to drive the pulldown element to greater conduction during transition from the high to low state while blocking paths to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state; and diode blocking means for blocking current flow from the output through the device to high potential in the event a higher voltage is applied to the output.

Claim 11

A transistor logic tristate output device comprising: an input for receiving binary data signals in the form of high and low potential states; a pullup element comprising transistor means for sourcing current from a high potential when the transistor means is conducting; a pulldown element comprising transistor means for sinking current to a low potential when said transistor means is conducting; phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state of said pullup and pulldown elements for either sourcing or sinking current in accordance with binary data signals at the input; an output coupled between the pullup and pulldown elements for delivering either high or low potential to a load according to whether the pullup or pulldown element is conducting; enable gate means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated; feedback transistor means coupled in current mirror configuration with the phase splitter element transistor means, said feedback transistor means coupled through one way diode means to the output without direct connection to the enable gate whereby the feedback transistor means accelerates pulldown during transition from the high to low state by feedback of current from any load coupled to the output to drive the pulldown element to greater conduction during transition from the high to low state while blocking paths to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state; and diode blocking means for blocking current flow from the output through the device to high potential in the event a higher voltage is applied to the output.

Claim 12

A transistor logic tristate output device as set forth in claim 7 wherein the feedback transistor means is also coupled to the pullup element to accelerate shutoff of the pullup element transistor means during transition from high to low state at the output.

Claim 13

A transistor logic tristate output comprising: an input for receiving binary data signals comprising high and low potential states; an output for delivering high and low potential states and for offering a high impedance third state; a pullup element comprising transistor means for sourcing current from a higher potential state to the output when the transistor means is conducting; a pulldown element comprising transistor means for sinking current from the output to a lower potential state when said transistor means is conducting; said output coupled between the pullup and pulldown elements for delivering either the higher or lower potential to a load according to whether the pullup or pulldown element is conducting; phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state or phase of the pullup and pulldown elements to alternately source or sink current at the output in accordance with binary data signals at the input; enable gate means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated, thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated; feedback transistor means coupled in parallel current mirror configuration with the phase splitter transistor means said feedback transistor means also coupled through one way diode means to the output without a direct coupling to the enable gate whereby the feedback means accelerates pulldown during transition from the high to low state at the output by feedback of current from any load coupled to the output to drive the pulldown element transistor means to greater conduction during transition from the high to low state, while preventing a route to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state; said feedback transistor means also coupled through one way diode means to the pullup element to accelerate shutoff of the pullup element transistor means further to accelerate transition from high to low state at the output; and diode blocking means for blocking current flow from the output through the device to high potential in the event a higher voltage is applied to the output.

Claim 14

A transistor logic tristate output comprising: an input for receiving binary data signals comprising high and low potential states; an output for delivering high and low potential states and for offering a high impedance third state; a pullup element comprising transistor means for sourcing current from a higher potential state to the output when the transistor means is conducting; a pulldown element comprising transistor means for sinking current from the output to a lower potential state when said transistor means is conducting; said output coupled between the pullup and pulldown elements for delivering either the higher or lower potential to a load according to whether the pullup or pulldown element is conducting; phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state or phase of the pullup and pulldown elements to alternately source or sink current at the output in accordance with binary data signals at the input; enable gate means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated, thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated; feedback transistor means coupled in parallel current mirror configuration with the phase splitter transistor means said feedback transistor means also coupled through one way diode means to the output without a direct coupling to the enable gate whereby the feedback means accelerates pulldown during transition from the high to low state at the output by feedback of current from any load coupled to the output to drive the pulldown element transistor means to greater conduction during transition from the high to low state, while preventing a route to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state; said feedback transistor means also coupled through one way diode means to the pullup element to accelerate shutoff of the pullup element transistor means further to accelerate transition from high to low state at the output; and diode blocking means for blocking current flow from the output through the device to high potential in the event a higher voltage is applied to the output.

Claim 15

A transistor logic tristate output device comprising: an input for receiving binary data signals in the form of high and low potential states; an output for delivering high and low potential states to a load and for offering a high impedance third state; a pullup element comprising transistor means for sourcing current from a high potential state to the output when the transistor means is conducting, the collector means of the pullup element coupled to a high potential source and the emitter means coupled to the output; a pulldown element comprising transistor means for sinking current from the output to a low potential source when said transistor means is conducting, the collector means of the pulldown element coupled to the output and the emitter means coupled to the low potential source; a phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state or phase of the pullup and pulldown elements to alternately source or sink current at the output in accordance with binary data signals at the input, the base means of said phase splitter element coupled to the input, the collector means of said phase splitter element coupled to the base means of the pullup element and the high potential source, and the emitter means of said phase splitter element coupled to the base means of the pulldown element; accelerating transistor means coupled in parallel configuration with the phase splitter element with common base and emitter means couplings, the collector means of said accelerating transistor means coupled to the high potential source, and through one way diode means to the output; enable gate element comprising transistor means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated, thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated, the collector means of said enable gate transistor sinking means coupled through one way diode means to the collector means of the phase splitter element and the base means of the pullup element, and through one way diode means to the base means of the phase splitter element and the base means of the accelerating transistor means; whereby the accelerating transistor means accelerates pulldown during transition from the high to low state at the output by sinking current from any load coupled to the output and driving the pulldown element to greater conduction while preventing a route to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state and the enable gate is activated sinking current from the elements of the device.

Claim 16

A transistor logic tristate output device comprising: an input for receiving binary data signals in the form of high and low potential states; an output for delivering high and low potential states to a load and for offering a high impedance third state; a pullup element comprising transistor means for sourcing current from a high potential state to the output when the transistor means is conducting, the collector means of the pullup element coupled to a high potential source and the emitter means coupled to the output; a pulldown element comprising transistor means for sinking current from the output to a low potential source when said transistor means is conducting, the collector means of the pulldown element coupled to the output and the emitter means coupled to the low potential source; a phase splitter element comprising transistor means coupled between the data signal input on the one hand and the pullup and pulldown elements on the other hand for alternately controlling the conducting state or phase of the pullup and pulldown elements to alternately source or sink current at the output in accordance with binary data signals at the input, the base means of said phase splitter element coupled to the input, the collector means of said phase splitter element coupled to the base means of the pullup element and the high potential source, and the emitter means of said phase splitter element coupled to the base means of the pulldown element; accelerating transistor means coupled in parallel configuration with the phase splitter element with common base and emitter means couplings, the collector means of said accelerating transistor means coupled to the high potential source, and through one way diode means to the output; enable gate element comprising transistor means for sinking current from the elements of the device so that they are all non-conducting when the enable gate means is activated, thereby to prevent either sinking or sourcing of current at the output by the pullup and pulldown elements whereby a high impedance third state is afforded at the output when the enable gate is activated, the collector means of said enable gate transistor sinking means coupled through one way diode means to the collector means of the phase splitter element and the base means of the pullup element, and through one way diode means to the base means of the phase splitter element and the base means of the accelerating transistor means; whereby the accelerating transistor means accelerates pulldown during transition from the high to low state at the output by sinking current from any load coupled to the output and driving the pulldown element to greater conduction while preventing a route to ground through the enable gate for any potential applied to the output while the device is in the high impedance third state and the enable gate is activated sinking current from the elements of the device.

Claim 17

A transistor logic tristate output device as set forth in claim 10 wherein the collector means of the accelerating transistor means is also coupled through one way diode means to the base means of the pullup element thereby accelerating turnoff of the pullup element to a non-conducting state during transition of the output from high to low potential while preventing a route from the output to ground through the enable gate when the output is in the high impedance third state.

Claim 18

A transistor logic tristate output device as set forth in claim 10 wherein the collector means of both the accelerating transistor means and the pullup element are coupled to the high potential source through one way diodes so that current cannot flow into the high voltage supply in the event a higher voltage is applied to the output of the device.