Fast/slow acting current limited for inverter power supply

Claim 1

An inverter power supply incorporating both fast and slow acting current limiters, comprising: a source of an unregulated current signal; current transformer means having primary winding means coupled to said unregulated current signal and secondary winding means; current detector means including said current transformer means for generating a variable sample voltage v s from said unregulated current signal; output transformer means having primary winding means coupled to said unregulated current signal and secondary winding means; output circuitry means coupled to said output transformers means' secondary winding means for generating a variable feedback voltage v fb that varies with the variation in the loading coupled thereto; switching means coupled to said primary winding means of said output transformer means for bidirectionally coupling a pulsed current signal of variable duty cycle thereto; pulse width modulator means coupled to said switching means for modulating the pulse width of said pulsed current signal in response to a variable control voltage v c ; slow current limiter means coupled to said current detector means for converting said variable sample voltage v s to an equivalent variable DC voltage v i level, comparing said variable DC voltage v i level to a fixed level DC reference voltage v r1 and generating a variable error voltage v ae1 therefrom that provides compensation in said variable control voltage v c for slow changes in said variable sample voltage v s ; voltage regulator means coupled to said variable error voltage v ae1 for combining said variable error voltage v ae1 , said variable feedback voltage v fb and a fixed level reference voltage v r2 and generating an amplified variable error voltage v ae2 therefrom and further including current rectifier means for rectifying said amplified variable error voltage v ae2 to generate a variable control voltage v c that provides a corresponding variable compensation in the duty cycle of said pulsed current signal by said pulse width modulator means; and, fast current limiter means coupled to said variable sample voltage v s and said variable control voltage v c including zener diode means, transistor means, and diode means, said diode means being forward biased whenever said variable control voltage v c exceeds the zener voltage of said zener diode means and the base drive of said transistor means for quickly decreasing said variable control voltage v c , said quickly decreasing variable control voltage v c generating a corresponding decrease in the duty cycle of said pulsed current signal by said pulse width modulator means.