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US4249137A Expired / Lapsed US ⏱️ 0.0 years remaining

Amplifier system with AGC, as for an AM radio

Assignee: RCA Licensing Corp
•
Filing: 1978-12-11
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Granted: 1981-02-03
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Expires: 1998-12-11
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Abstract

Abstract A common-emitter-amplifier transistor with tuned collector circuit has its gain controlled by the variation of an emitter degeneration resistance responsive to an automatic gain control voltage. This emitter degeneration resistance is provided by the collector-to-emitter path of a gain-controlling transistor having relatively large emitter-base junction area and receiving the automatic gain control voltage at its base electrode. The amplifier transistor is provided temperature compensated base biasing so its emitter-follower action maintains its emitter electrode at a voltage, which applied as the emitter-to-collector voltage of the gain controlling transistor conditions the gain controlling transistor to operate in saturation. Under strong signal conditions the increase in emitter degeneration resistance reduces the severity of cross-modulation and inter-modulation effects. The disclosure describes an AM radio receiver using this type of automatic gain control for its r-f and i-f amplifier stages. Circuitry for avoiding overload distortion in the r-f amplifier is also described.

Inventors

  • 👤 Max E. Malchow

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 08:45
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3052; H03G3/3063; H04; H04R; H04R25/00; H04R25/35; H04R25/356

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 326 words
A gain-controlled amplifier with tuned load comprising: first and second transistors of the same conductivity type having respectively small and respectively large area base-emitter junctions and having respective base, emitter and collector electrodes; an input signal terminal; a feed-forward capacitor connected between said input signal terminal and said tuned load means; means for connecting the collector electrode of said first transistor to said tuned load means and to an operating voltage; means connecting said second transistor for providing between its emitter and collector electrodes an electrically adjustable emitter degeneration resistance for said first transistor, controllable in response to the emitter-to-base potential of said second transistor, including a direct connection of the emitter electrode of said first transistor to the collector electrode of said second transistor, a connection of the emitter electrode of said second transistor to a reference voltage and signal ground, and means for applying a temperature-compensated quiescent potential between the emitter electrode of said second transistor and the base electrode of said first transistor that tends to maintain said second transistor in saturated conduction; means responsive to the amplitude of the response to said input signal appearing at said tuned load for developing an automatic gain control voltage; means for applying said automatic gain control voltage as the emitter-to-base potential of said second transistor; and means for selectively providing drive to the base electrode of said first transistor from said input signal terminal, including means for sensing when said automatic gain control voltage is of a level indicating that the amplitude of the response to said input signal appearing at said tuned load is sufficient, that the portion of that response attributable to input signal current fed forward through said feed-forward capacitor exceeds the portion of that response caused by the collector current of said first transistor, and including means responsive to that condition being sensed for interrupting drive otherwise provided to the base electrode of said first transistor from said input signal terminal.
Claim 2
Dependent Claim 326 words
A gain-controlled amplifier with tuned load comprising: first and second transistors of the same conductivity type having respectively small and respectively large area base-emitter junctions and having respective base, emitter and collector electrodes; an input signal terminal; a feed-forward capacitor connected between said input signal terminal and said tuned load means; means for connecting the collector electrode of said first transistor to said tuned load means and to an operating voltage; means connecting said second transistor for providing between its emitter and collector electrodes an electrically adjustable emitter degeneration resistance for said first transistor, controllable in response to the emitter-to-base potential of said second transistor, including a direct connection of the emitter electrode of said first transistor to the collector electrode of said second transistor, a connection of the emitter electrode of said second transistor to a reference voltage and signal ground, and means for applying a temperature-compensated quiescent potential between the emitter electrode of said second transistor and the base electrode of said first transistor that tends to maintain said second transistor in saturated conduction; means responsive to the amplitude of the response to said input signal appearing at said tuned load for developing an automatic gain control voltage; means for applying said automatic gain control voltage as the emitter-to-base potential of said second transistor; and means for selectively providing drive to the base electrode of said first transistor from said input signal terminal, including means for sensing when said automatic gain control voltage is of a level indicating that the amplitude of the response to said input signal appearing at said tuned load is sufficient, that the portion of that response attributable to input signal current fed forward through said feed-forward capacitor exceeds the portion of that response caused by the collector current of said first transistor, and including means responsive to that condition being sensed for interrupting drive otherwise provided to the base electrode of said first transistor from said input signal terminal.
Claim 3
Dependent Claim 181 words
In combination: means for supplying input signal with a range of strengths; a common-emitter transistor amplifier having base, emitter and collector circuits; means responsive to the amplitude of signal in said collector circuit for providing a gain control signal; means responsive to said gain control signal for applying reverse automatic gain control to said emitter circuit; means for feeding forward a portion of said input signal to said collector circuit; means for selectively providing drive to said base circuit from said means for supplying input signal, including means for sensing when said gain control signal is of a level indicating the amplitude of the component of signal in said collector circuit attributable to the feed-forward portion of said input signal would be of a magnitude greater than the component that would be attributable to the input signal being amplified by said common-emitter amplifier transistor were its base circuit driven from said means for supplying input signal, and including means responsive to that condition being sensed for interrupting drive otherwise provided to said base circuit from said means for supplying input signal.
Claim 4
Dependent Claim 181 words
In combination: means for supplying input signal with a range of strengths; a common-emitter transistor amplifier having base, emitter and collector circuits; means responsive to the amplitude of signal in said collector circuit for providing a gain control signal; means responsive to said gain control signal for applying reverse automatic gain control to said emitter circuit; means for feeding forward a portion of said input signal to said collector circuit; means for selectively providing drive to said base circuit from said means for supplying input signal, including means for sensing when said gain control signal is of a level indicating the amplitude of the component of signal in said collector circuit attributable to the feed-forward portion of said input signal would be of a magnitude greater than the component that would be attributable to the input signal being amplified by said common-emitter amplifier transistor were its base circuit driven from said means for supplying input signal, and including means responsive to that condition being sensed for interrupting drive otherwise provided to said base circuit from said means for supplying input signal.
Claim 5
Dependent Claim 382 words
A gain-controlled amplifier with tuned load comprising: first and second transistors of the same conductivity type having respective base, emitter and collector electrodes; an input signal terminal; impedance means connecting said input signal terminal to a first point; means for applying the potential at said first point to the base electrode of said first transistor; a feed-forward capacitor connected between said input signal terminal and said tuned load means; means for connecting the collector electrode of said first transistor to said tuned load means and to an operating voltage; means connecting said second transistor for providing between its emitter and collector electrodes an electrically adjustable emitter degeneration resistance for said first transistor, controllable in response to the emitter-to-base potential of said second transistor, including a direct connection of the emitter electrode of said first transistor to the collector electrode of said second transistor, and including a connection of the emitter electrode of said second transistor to a reference voltage and signal ground, and means for applying a temperature-compensated quiescent potential between the emitter electrode of said second transistor and said first point that tends to maintain said second transistor in saturated conduction; AGC detector means responsive to the amplitude of the response to said input signal appearing at said tuned load for developing an automatic gain control voltage; transistor means of the same conductivity type as said first and second transistors having base electrode means to which said automatic gain control voltage is applied, having collector electrode means connected to said operating voltage and having first and second emitter electrodes; means for connecting the first emitter electrode of said transistor means to the base electrode of said second transistor; means for sensing when the potential at the second emitter electrode of said transistor means is of a level indicating that the amplitude of the response to said input signal appearing at said tuned load is sufficient, that the portion of that response attributable to input signal current fed forward through said feed-forward capacitor exceeds the portion of that response caused by the collector current of said first transistor; and controlled clamping means responsive to that condition being sensed for clamping said first point to said reference voltage, thus interrupting input signal drive otherwise provided to the base electrode of said first transistor.
Claim 6
Dependent Claim 382 words
A gain-controlled amplifier with tuned load comprising: first and second transistors of the same conductivity type having respective base, emitter and collector electrodes; an input signal terminal; impedance means connecting said input signal terminal to a first point; means for applying the potential at said first point to the base electrode of said first transistor; a feed-forward capacitor connected between said input signal terminal and said tuned load means; means for connecting the collector electrode of said first transistor to said tuned load means and to an operating voltage; means connecting said second transistor for providing between its emitter and collector electrodes an electrically adjustable emitter degeneration resistance for said first transistor, controllable in response to the emitter-to-base potential of said second transistor, including a direct connection of the emitter electrode of said first transistor to the collector electrode of said second transistor, and including a connection of the emitter electrode of said second transistor to a reference voltage and signal ground, and means for applying a temperature-compensated quiescent potential between the emitter electrode of said second transistor and said first point that tends to maintain said second transistor in saturated conduction; AGC detector means responsive to the amplitude of the response to said input signal appearing at said tuned load for developing an automatic gain control voltage; transistor means of the same conductivity type as said first and second transistors having base electrode means to which said automatic gain control voltage is applied, having collector electrode means connected to said operating voltage and having first and second emitter electrodes; means for connecting the first emitter electrode of said transistor means to the base electrode of said second transistor; means for sensing when the potential at the second emitter electrode of said transistor means is of a level indicating that the amplitude of the response to said input signal appearing at said tuned load is sufficient, that the portion of that response attributable to input signal current fed forward through said feed-forward capacitor exceeds the portion of that response caused by the collector current of said first transistor; and controlled clamping means responsive to that condition being sensed for clamping said first point to said reference voltage, thus interrupting input signal drive otherwise provided to the base electrode of said first transistor.
Claim 7
Dependent Claim 105 words
A gain-controlled amplifier as set forth in claim 3 wherein said means for sensing includes: a third transistor of the same conductivity type as said first and second transistors, having base and emitter and collector electrodes; means for connecting the second emitter electrode of said transistor means to the base electrode of said third transistor; means for connecting the emitter electrode of said third transistor to said reference voltage; and means for completing the connection of said third transistor as a common-emitter amplifier including a resistive collector load across which a voltage related to said sensed current is provided for controlling said controlled clamping means.
Claim 8
Dependent Claim 120 words
A gain-controlled amplifier as set forth in claim 4 wherein said means applying the potential at said first point to the base electrode of said first transistor is a fourth transistor of the same conductivity as said first and second transistors, in emitter-follower connection; and wherein said means applying a temperature-compensated quiescent potential between the emitter electrode of said transistor and said first point includes a source of first offset potential from said reference voltage, which first offset potential is twice as large as the offset potential across a forward-biased semiconductor junction, would be and includes a resistor connected at a first end thereof to said first point and at a second end thereof to receive said first offset potential.
Claim 9
Dependent Claim 176 words
A gain-controlled amplifier as set forth in claim 5 wherein said AGC detector means includes: a source of second offset potential from said reference voltage, which second offset potential is substantially three times as large as the offset potential across a forward-biased semiconductor junction would be; an AGC filter capacitor with a first plate connected to reference voltage and signal ground and with a second plate; a resistive path between said source of second offset potential and the second plate of said AGC filter capacitor, a point along said resistive path being connected to the base electrode means of said transistor means; an AGC by-pass capacitor bypassing that point along said resistive path to signal ground; first and second diode means, with an interconnection therebetween, serially connected across said AGC filter capacitor in a poling to be forward biased by quiescent current flow via said resistive path from said source of second offset potential; means responsive to signal appearing across said tuned load for supplying signal to said interconnection between said first and second diode means.
Claim 10
Dependent Claim 65 words
A gain-controlled amplifier as set forth in claim 4, 5 or 6 wherein said controlled clamping means includes: a further transistor of the same conductivity type as said first and second transistors, having a base electrode to which the collector electrode of said third transistor connects, having an emitter electrode connected to said reference voltage, and having a collector electrode connected to said first point.
Claim 11
Dependent Claim 393 words
An amplifier with automatic gain control (AGC) comprising: a first bus for reference voltage and signal ground; a second bus for operating voltage; means for providing a first direct bias voltage offset from said reference voltage in the same sense as said operating voltage by an amount three times what the offset voltage across a single forward-biased semiconductor junction means or diode means would be; an AGC filter capacitor having a first plate connected to said first bus and having a second plate; a resistive path applying said first direct bias voltage to the second plate of said AGC filter capacitor; an AGC by-pass capacitor by-passing a first point in said resistive path to signal ground; first and second diode means with an interconnection therebetween serially connected between said first bus and the second plate of said AGC capacitor in such poling as to be forward-biased by the quiescent current flow via said resistive path owing to said first bias voltage; first and second transistors of the same conductivity type having respective base and emitter and collector electrodes; means for applying, at least at selected times, input signal to the base electrode of said first transistor; means, including a first tuned collector load, for connecting the collector electrode of said first transistor to said second bus; means connecting said second transistor for providing between its emitter and collector electrodes an electrically adjustable emitter degeneration resistance for said first transistor controllable in response to the emitter-to-base potential of said second transistor, including a direct connection of the emitter electrode of said first transistor to the collector electrode of said second transistor; a connection of the emitter electrode of said second transistor to said first bus; a first current-limiting resistor and a first semiconductor junction means serially connected between said first point in said resistive path and the base electrode of said second transistor for offsetting the base potential of said second transistor towards said reference voltage from the voltage at said first point, and means for applying a temperature-compensated first quiescent potential between said first bus and the base electrode of said first transistor that tends to maintain said second transistor in saturated conduction; and means responsive to signal appearing across said first tuned collector load to apply signal to said interconnection between said first and second diode means for completing an AGC loop.
Claim 12
Dependent Claim 393 words
An amplifier with automatic gain control (AGC) comprising: a first bus for reference voltage and signal ground; a second bus for operating voltage; means for providing a first direct bias voltage offset from said reference voltage in the same sense as said operating voltage by an amount three times what the offset voltage across a single forward-biased semiconductor junction means or diode means would be; an AGC filter capacitor having a first plate connected to said first bus and having a second plate; a resistive path applying said first direct bias voltage to the second plate of said AGC filter capacitor; an AGC by-pass capacitor by-passing a first point in said resistive path to signal ground; first and second diode means with an interconnection therebetween serially connected between said first bus and the second plate of said AGC capacitor in such poling as to be forward-biased by the quiescent current flow via said resistive path owing to said first bias voltage; first and second transistors of the same conductivity type having respective base and emitter and collector electrodes; means for applying, at least at selected times, input signal to the base electrode of said first transistor; means, including a first tuned collector load, for connecting the collector electrode of said first transistor to said second bus; means connecting said second transistor for providing between its emitter and collector electrodes an electrically adjustable emitter degeneration resistance for said first transistor controllable in response to the emitter-to-base potential of said second transistor, including a direct connection of the emitter electrode of said first transistor to the collector electrode of said second transistor; a connection of the emitter electrode of said second transistor to said first bus; a first current-limiting resistor and a first semiconductor junction means serially connected between said first point in said resistive path and the base electrode of said second transistor for offsetting the base potential of said second transistor towards said reference voltage from the voltage at said first point, and means for applying a temperature-compensated first quiescent potential between said first bus and the base electrode of said first transistor that tends to maintain said second transistor in saturated conduction; and means responsive to signal appearing across said first tuned collector load to apply signal to said interconnection between said first and second diode means for completing an AGC loop.
Claim 13
Dependent Claim 272 words
An amplifier with AGC as set forth in claim 8 wherein said means for completing an AGC loop includes in cascade connection a first detector stage and an intermediate-frequency amplifier stage, said intermediate-frequency amplifier stage comprising: third and fourth transistors of the same conductivity type as said first and second transistors, having respective base and emitter and collector electrodes; means for applying intermediate-frequency signal from said first detector stage to the base electrode of said third transistor; means, including a second tuned collector load, for connecting the collector electrode of said third transistor to said second bus; means for applying a portion of the amplified intermediate frequency signal at the collector electrode of said third transistor to said interconnection between said first and second diode means; means connecting said fourth transistor for providing between its emitter and collector electrodes an electrically adjustable emitter degeneration resistance for said third transistor controllable in response to the emitter-to-base potential of said fourth transistor, including a direct connection of the emitter electrode of said third transistor to the collector electrode of said fourth transistor; a connection of the emitter electrode of said fourth transistor to said first bus; a second current-limiting resistor and a second semiconductor junction means connected between a second point in said resistive path and the base electrode of said fourth transistor for offsetting the base potential of said fourth transistor towards said reference voltage from the voltage at said second point; and means for applying a second temperature-compensated quiescent potential between said first bus and the base electrode of said third transistor that tends to maintain said fourth transistor in saturated conduction.
Claim 14
Dependent Claim 35 words
An amplifier with AGC, as set forth in claim 9, including a shunting resistor connected between the collector and emitter electrodes of said fourth transistor for establishing a minimum gain for said intermediate-frequency amplifier stage.
Claim 15
Dependent Claim 87 words
An amplifier with AGC, as set forth in claim 8, 9 or 10 wherein a feed-forward capacitor is connected for continuously applying input signal to said first tuned collector load; and wherein said means for applying, at least at selected times, input signal to the base electrode of said first transistor includes: means for diverting input signal from the base electrode of said first transistor whenever the voltage at said first point in said resistive path falls below a prescribed threshold value respective to said reference voltage.
Claim 16
Dependent Claim 240 words
An amplifier with AGC as set forth in claim 9 wherein said means for applying, at least at selected times, input signal to the base electrode of said first transistor includes: an input signal terminal; an impedance element having a first end connected to said input signal terminal and having a second end; a fifth emitter-follower transistor of the same conductivity type as said first transistor having a base electrode to which the second end of said impedance element connects and having an emitter electrode connected to the base electrode of said first transistor; and means for clamping the base electrode of said fifth transistor towards reference voltage to maintain non-conduction of said first transistor whenever the voltage at said first point in said resistive path falls below a prescribed threshold value respective to said reference voltage; wherein a feed-forward capacitor connects said input signal terminal and said first tuned collector load for continually feeding forward input signal thereto; and wherein said means for applying a temperature-compensated first quiescent potential includes in addition to said fifth transistor the following: means for providing a second direct bias voltage offset from said reference voltage in the same sense as said operating voltage by an amount substantially twice what the offset voltage across a single forward-biased semiconductor junction means or diode means would be; and a base-biasing resistor for applying said second direct bias voltage to the base electrode of said fifth transistor.
Claim 17
Dependent Claim 275 words
An amplifier with AGC as set forth in claim 12 wherein said means for providing a first direct bias voltage and said means for providing a second direct bias voltage together comprise: a first biasing resistance having a first end connected to said second bus and having a second end; and third, fourth and fifth diode means serially connected without substantial intervening impedances in recited order and in forward poling between said first bus and the second end of said first biasing resistance, said first direct bias voltage being provided at the interconnection between said fifth diode means and said biasing resistance, and said second direct bias voltage being provided at the interconnection of said fourth and fifth diode means; and wherein said means for applying a second temperature-compensated quiescent potential comprises: a sixth, emitter-follower transistor of the same conductivity type as said third transistor having an emitter electrode connected to the base electrode of said third transistor and having a base electrode connected for including said sixth, emitter-follower transistor in said means for applying intermediate-frequency signal from said first detector stage to the base electrode of said third transistor; a second biasing resistance having a first end connected to said second bus and having a second end; a seventh transistor having a collector-to-emitter path connected between said first bus and the second end of said second biasing resistance and having an emitter-base circuit; means dividing the potential across the collector-to-emitter path of said seventh transistor for application to its emitter-base circuit; and means for applying the potential at the second end of said second biasing resistance to the base electrode of said sixth transistor.
Claim 18
Dependent Claim 86 words
An amplifier with AGC as set forth in claim 13 wherein said means for connecting the collector electrode of said first transistor to said second bus includes: a further transistor of the same conductivity type as said first transistor in cascode connection therewith, having an emitter electrode to which the collector electrodes of said first transistor connects, having a base electrode to which said first direct bias voltage is applied, and having a collector electrode connected via said first tuned collector load to said second bus.
Claim 19
Dependent Claim 34 words
The amplifier with AGC as set forth in claim 13 wherein means are connected between said first and second busses for regulating the operating voltage therebetween to increase with the temperature of said transistors.
Claim 20
Dependent Claim 240 words
An amplifier with AGC as set forth in claim 8 wherein said means for applying, at least at selected times, input signal to the base electrode of said first transistor includes: an input signal terminal, an impedance element having a first end connected to said input signal terminal and having a second end, a third emitter-follower transistor of the same conductivity type as said first transistor, having a base electrode to which the second end of said impedance element connects and having an emitter electrode connected to the base electrode of said first transistor, and means for clamping the base electrode of said third transistor towards reference voltage to maintain non-conduction of said first transistor whenever the voltage at said first point in said resistive path (respective to said reference voltage) falls below a prescribed threshold value; wherein a feed-forward capacitor connects said input signal terminal and said first tuned collector load for continually feeding forward input signal thereto; and wherein said means for applying a temperature-compensated first quiescent potential includes in addition to said third transistor the following: means for providing a second direct bias voltage offset from said reference voltage in the same sense as said operating voltage by an amount substantially twice what the offset voltage across a single forward-biased semiconductor junction means or diode means would be; and a base-biasing resistor for applying said second direct bias voltage to the base electrode of said third transistor.
Claim 21
Dependent Claim 122 words
An amplifier with AGC as set forth in claim 12 or 16, wherein said means for providing a first direct bias voltage and said means for providing a second direct bias voltage together comprise: a first biasing resistance having a first end connected to said second bus and having a second end; and third, fourth and fifth diode means serially connected without substantial intervening impedances in recited order and in forward poling between said first bus and the second end of said first biasing resistance, said first direct bias voltage being provided at the interconnection between said fifth diode means and said biasing resistance, and said second direct bias voltage being provided at the interconnection of said fourth and fifth diode means.
Claim 22
Dependent Claim 86 words
An amplifier with AGC as set forth in claim 17 wherein said means for connecting the collector electrode of said first transistor to said second bus includes: a further transistor of the same conductivity type as said first transistor in cascode connection therewith, having an emitter electrode to which the collector electrode of said first transistor connects, having a base electrode to which said first direct bias voltage is applied, and having a collector electrode connected via said first tuned collector load to said second bus.
Claim 23
Dependent Claim 34 words
The amplifier with AGC as set forth in claim 17 wherein means are connected between said first and second busses for regulating the operating voltage therebetween to increase with the temperature of said transistors.

References Cited (Backward Citations)

US3143711A Cited
US3264564A Cited
US3421100A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-02-03 1984-08-04 1985-02-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-02-03 1988-08-04 1989-02-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-02-03 1992-08-04 1993-02-03 $7700.00 Window Closed / Lapsed

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