Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
542 words
An automatic frequency scanning FM radio receiver comprising: a phase-locked loop frequency synthesizer acting as a local oscillator circuit tunable to different radio frequencies and having a voltage-controlled oscillator, a programmable counter for dividing the output frequency of said voltage-controlled oscillator, the dividing factor of said programmable counter being changeable in integral steps by a program input code signal applied thereto, a reference oscillator, a phase comparator for comparing in phase an output signal of said reference oscillator with an output signal of said programmable counter, and a loop filter connected between an output of said phase comparator and a control input of said voltage-controlled oscillator, the output frequency of said voltage-controlled oscillator being changed in steps in response to change in the dividing factor of said programmable counter provided by the program input signal; a mixer circuit coupled to said voltage-controlled oscillator for mixing an incoming radio frequency signal with the output signal of said voltage-controlled oscillator to produce an intermediate-frequency FM signal; a scan clock pulse source; scan counter means coupled to said scan clock pulse source for counting scan clock pulses to supply said programmable counter with the program input code signal whose code numbers change in integral steps, whereby said frequency synthesizer is caused automatically to scan channels having frequencies corresponding to the code numbers within a radiobroadcasting frequency band, said scan counter means comprising an up/down counter; a tuning detection means for detecting that the receiver is tuned to a broadcast signal having an input level above a predetermined level, said tuning detection means comprising a frequency discriminator connected to receive the intermediate-frequency FM signal, a first circuit means for detecting the level of noise appearing at the output of said frequency discriminator, a second circuit means for detecting the level of a direct-current voltage indicating the degree of tuning of the receiver which appears at the output of said frequency discriminator, and a third circuit means producing a control signal to disable said scan clock pulse source from producing the scan clock pulses when the noise level detected by said first circuit means is below a squelch level and the DC output level of said frequency discriminator detected by said second circuit means indicates that the receiver is completely tuned; means for disabling said scan clock pulse source from producing the scan clock pulses when the receiver is completely tuned to said broadcast signal in response to said control signal of said tuning detection means; one-step manual scanning control switch means connected to said scan counter means and to said disabling means for disabling the scan clock pulse source from producing the scan clock pulses, said one-step manual scanning control switch means, when operated, actuating said disabling means and changing the count number in said scan counter means by one step for each operation thereof, and having a first switch for increasing the count number in said scan counter means by one step for each operation thereof and a second switch for decreasing said count number by one step for each operation thereof; and a control means for reversing the counting direction of said up/down counter when the count number in said up/down counter attains a value corresponding to the minimum frequency in said frequency band.
Claim 2
Dependent Claim
542 words
An automatic frequency scanning FM radio receiver comprising: a phase-locked loop frequency synthesizer acting as a local oscillator circuit tunable to different radio frequencies and having a voltage-controlled oscillator, a programmable counter for dividing the output frequency of said voltage-controlled oscillator, the dividing factor of said programmable counter being changeable in integral steps by a program input code signal applied thereto, a reference oscillator, a phase comparator for comparing in phase an output signal of said reference oscillator with an output signal of said programmable counter, and a loop filter connected between an output of said phase comparator and a control input of said voltage-controlled oscillator, the output frequency of said voltage-controlled oscillator being changed in steps in response to change in the dividing factor of said programmable counter provided by the program input signal; a mixer circuit coupled to said voltage-controlled oscillator for mixing an incoming radio frequency signal with the output signal of said voltage-controlled oscillator to produce an intermediate-frequency FM signal; a scan clock pulse source; scan counter means coupled to said scan clock pulse source for counting scan clock pulses to supply said programmable counter with the program input code signal whose code numbers change in integral steps, whereby said frequency synthesizer is caused automatically to scan channels having frequencies corresponding to the code numbers within a radiobroadcasting frequency band, said scan counter means comprising an up/down counter; a tuning detection means for detecting that the receiver is tuned to a broadcast signal having an input level above a predetermined level, said tuning detection means comprising a frequency discriminator connected to receive the intermediate-frequency FM signal, a first circuit means for detecting the level of noise appearing at the output of said frequency discriminator, a second circuit means for detecting the level of a direct-current voltage indicating the degree of tuning of the receiver which appears at the output of said frequency discriminator, and a third circuit means producing a control signal to disable said scan clock pulse source from producing the scan clock pulses when the noise level detected by said first circuit means is below a squelch level and the DC output level of said frequency discriminator detected by said second circuit means indicates that the receiver is completely tuned; means for disabling said scan clock pulse source from producing the scan clock pulses when the receiver is completely tuned to said broadcast signal in response to said control signal of said tuning detection means; one-step manual scanning control switch means connected to said scan counter means and to said disabling means for disabling the scan clock pulse source from producing the scan clock pulses, said one-step manual scanning control switch means, when operated, actuating said disabling means and changing the count number in said scan counter means by one step for each operation thereof, and having a first switch for increasing the count number in said scan counter means by one step for each operation thereof and a second switch for decreasing said count number by one step for each operation thereof; and a control means for reversing the counting direction of said up/down counter when the count number in said up/down counter attains a value corresponding to the minimum frequency in said frequency band.
Claim 3
Dependent Claim
47 words
The automatic frequency acanning radio receiver according to claim 1 further including means for presetting, when a power supply is turned on, said scanning counter means at such a value as to cause said frequency synthesizer to tune to a predetermined frequency within a radiobroadcasting frequency band.
Claim 4
Dependent Claim
30 words
The automatic frequency scanning radio receiver according to claim 1 further including switch means connected to said control means for manually reversing the counting direction of said scan counter means.
Claim 5
Dependent Claim
70 words
The automatic frequency scanning radio receiver according to claim 1 further including automatic scanning control switch means for resuming the scan clock pulse counting of said scan counter means after the counting operation of said counter means is disabled by said disabling means, said automatic scanning control switch means having third and fourth switches for setting the counting direction of said scan counter means to up and down directions, respectively.
Claim 6
Dependent Claim
84 words
The automatic frequency scanning radio receiver according to claim 1 further including mute gate means provided in a signal transmission path connected to the output side of said frequency discriminator and interrupting said signal transmission path on at least one of the conditions that said tuning detection means is not detecting the receiver completely tuned and that said phase-locked loop frequency synthesizer is detuned when the output signal of said programmable counter is out of phase with the output signal of said reference oscillator.
Claim 7
Dependent Claim
26 words
The automatic frequency scanning radio receiver according to claim 1, wherein said tuning detection means further comprises means for adjusting said squelch level of said noise.
Claim 8
Dependent Claim
432 words
An automatic frequency scanning FM radio receiver comprising: a phase-locked loop frequency synthesizer acting as a local oscillator circuit tunable to different radio frequencies and having a voltage-controlled oscillator, a programmable counter for dividing the output frequency of said voltage-controlled oscillator, the dividing factor of said programmable counter being changeable in integral steps by a program input code signal applied thereto, a reference oscillator, a phase comparator for comparing in phase an output signal of said reference oscillator with an output signal of said programmable counter, and a loop filter connected between an output of said phase comparator and a control input of said voltage-controlled oscillator, the output frequency of said voltage-controlled oscillator being changed in steps in response to change in the dividing factor of said programmable counter provided by the program input signal; a mixer circuit coupled to said voltage-controlled oscillator for mixing an incoming radio frequency signal with the output signal of said voltage-controlled oscillator to produce an intermediate-frequency FM signal; a scan clock pulse source; scan counter means coupled to said scan clock pulse source for counting scan clock pulses to supply said programmable counter with the program input code signal whose code numbers change in integral steps, whereby said frequency synthesizer is caused automatically to scan channels having frequencies corresponding to the code numbers within a radiobroadcasting frequency band; a frequency discriminator connected to receive the intermediate-frequency FM signal; a tuning detection means connected to the output of said frequency discriminator for detecting that the receiver is tuned to a broadcast signal having an input level above a predetermined level; means responsive to said tuning detection means to interrupt the scan clock pulse counting of said scan counter means when the receiver is tuned to said broadcast signal; manual one-step control switch circuit means which includes a control switch for producing a one-step control signal for each operation of a manual one-step control switch; delay circuit means connected to receive said one-step control signal to produce a delayed one-step control signal; and edge detection circuit means responsive to said delayed one-step control signal to produce a one-step control pulse corresponding to a predetermined edge of said delayed control signal; and wherein said scan counter means includes a plurality of decade counter stages each having a clock input and a carry output, said clock input and carry output of each decade counter stage being coupled to said clock input of an immediately succeeding counter stage, and said clock input of a first counter stage being coupled to said edge detection circuit means to receive said one-step control pulse.
Claim 9
Dependent Claim
432 words
An automatic frequency scanning FM radio receiver comprising: a phase-locked loop frequency synthesizer acting as a local oscillator circuit tunable to different radio frequencies and having a voltage-controlled oscillator, a programmable counter for dividing the output frequency of said voltage-controlled oscillator, the dividing factor of said programmable counter being changeable in integral steps by a program input code signal applied thereto, a reference oscillator, a phase comparator for comparing in phase an output signal of said reference oscillator with an output signal of said programmable counter, and a loop filter connected between an output of said phase comparator and a control input of said voltage-controlled oscillator, the output frequency of said voltage-controlled oscillator being changed in steps in response to change in the dividing factor of said programmable counter provided by the program input signal; a mixer circuit coupled to said voltage-controlled oscillator for mixing an incoming radio frequency signal with the output signal of said voltage-controlled oscillator to produce an intermediate-frequency FM signal; a scan clock pulse source; scan counter means coupled to said scan clock pulse source for counting scan clock pulses to supply said programmable counter with the program input code signal whose code numbers change in integral steps, whereby said frequency synthesizer is caused automatically to scan channels having frequencies corresponding to the code numbers within a radiobroadcasting frequency band; a frequency discriminator connected to receive the intermediate-frequency FM signal; a tuning detection means connected to the output of said frequency discriminator for detecting that the receiver is tuned to a broadcast signal having an input level above a predetermined level; means responsive to said tuning detection means to interrupt the scan clock pulse counting of said scan counter means when the receiver is tuned to said broadcast signal; manual one-step control switch circuit means which includes a control switch for producing a one-step control signal for each operation of a manual one-step control switch; delay circuit means connected to receive said one-step control signal to produce a delayed one-step control signal; and edge detection circuit means responsive to said delayed one-step control signal to produce a one-step control pulse corresponding to a predetermined edge of said delayed control signal; and wherein said scan counter means includes a plurality of decade counter stages each having a clock input and a carry output, said clock input and carry output of each decade counter stage being coupled to said clock input of an immediately succeeding counter stage, and said clock input of a first counter stage being coupled to said edge detection circuit means to receive said one-step control pulse.