US4245169A
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US
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Sampling circuit and method therefor
Assignee: United States Department of Commerce
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Filing: 1979-03-14
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Granted: 1981-01-13
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Expires: 1999-03-14
Abstract
Abstract A sampling circuit and method therefor including a first Josephson junctionor producing a series of sampling pulses for activating a second Josephson junction that is receptive of both the analog current signal being sampled and a bias current. The first Josephson junction is continually triggered at a fixed time relative to the repetitive analog signal to provide a series of sampling pulses and before each sampling pulse the bias level to the second Josephson junction is changed until the sum of the current from the sampling pulse, from the analog signal, and from the bias source exceeds the critical current value of the second Josephson junction causing it to switch from one voltage state to another. The value of the bias current at the point of switching is proportional to the current in the analog signal. In one embodiment, the bias current is increased in a step-like fashion for each sampling pulse from the first Josephson junction until the critical value of the second Josephson junction is reached. The resolution of the analog signal for this embodiment is 1/N if there are N samples. In another embodiment where the analog signal is known to exist between two extremes, the bias current for the first sample is initially positioned at a mid-range value between the extremes. If, at the sample time, the second Josephson junction is switched, the bias current for the next sample is reduced by 1/2. If the second Josephson junction has not switched, the bias current is increased by 1/2 for the next sample. This process continues for N samples, the resulting resolution being 1/2 N .
Inventors
- 👤 Clark Hamilton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:40
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/02; G11C27/022; G11C11/00; G11C11/21; G11C11/44; Y; Y10; Y10S; Y10S505/00; Y10S505/825; Y10S505/856; Y10S505/857; Y10S505/86; Y10S505/861
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
124 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating sampling pulses, means for generating steps of increasing bias current, said sampling pulse generating means being capable of generating one sampling pulse at a predetermined time in each of said steps, and means receptive of said sampling current pulses, said bias current steps, and of said analog current signal for switching from a first state to a second state to generate an output signal only when the sum of the current from said sample pulse, said analog signal, and from said bias step exceeds a predetermined value, the value of said bias current when said output signal is generated being proportional to said analog current value.
Claim 2
Dependent Claim
124 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating sampling pulses, means for generating steps of increasing bias current, said sampling pulse generating means being capable of generating one sampling pulse at a predetermined time in each of said steps, and means receptive of said sampling current pulses, said bias current steps, and of said analog current signal for switching from a first state to a second state to generate an output signal only when the sum of the current from said sample pulse, said analog signal, and from said bias step exceeds a predetermined value, the value of said bias current when said output signal is generated being proportional to said analog current value.
Claim 3
Dependent Claim
152 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating trigger pulses, means receptive of each of said trigger pulses for generating a sampling current pulse, said sampling current pulse being much shorter in time duration than said trigger pulse, means for generating steps of increasing bias current, said trigger pulse generating means being capable of generating one trigger pulse at a predetermined time in each of said steps, and means receptive of said sampling current pulses, said bias current steps, and of said analog current signal for switching from a first state to a second state to generate an output signal only when the sum of the current from said sample pulse, said analog signal, and from said bias step exceeds a predetermined value, the value of said bias current when said output signal is generated being proportional to said analog current value.
Claim 4
Dependent Claim
152 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating trigger pulses, means receptive of each of said trigger pulses for generating a sampling current pulse, said sampling current pulse being much shorter in time duration than said trigger pulse, means for generating steps of increasing bias current, said trigger pulse generating means being capable of generating one trigger pulse at a predetermined time in each of said steps, and means receptive of said sampling current pulses, said bias current steps, and of said analog current signal for switching from a first state to a second state to generate an output signal only when the sum of the current from said sample pulse, said analog signal, and from said bias step exceeds a predetermined value, the value of said bias current when said output signal is generated being proportional to said analog current value.
Claim 5
Dependent Claim
168 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating trigger pulses, means receptive of each of said trigger pulses for generating a sampling voltage pulse, said sampling voltage pulse being much shorter in time duration than said trigger pulse, means receiving said sampling voltage pulse for converting said voltage pulse into a sampling current pulse, means for generating steps of increasing bias current, said trigger pulse generating means being capable of generating one trigger pulse at a predetermined time in each of said steps, and means receptive of said sampling current pulses, said bias current steps, and of said analog current signal for switching from a first state to a second state to generate an output signal only when the sum of the current from said sample pulse, said analog signal, and from said bias step exceeds a predetermined value, the value of said bias current when said output signal is generating being proportional to said analog current value.
Claim 6
Dependent Claim
168 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating trigger pulses, means receptive of each of said trigger pulses for generating a sampling voltage pulse, said sampling voltage pulse being much shorter in time duration than said trigger pulse, means receiving said sampling voltage pulse for converting said voltage pulse into a sampling current pulse, means for generating steps of increasing bias current, said trigger pulse generating means being capable of generating one trigger pulse at a predetermined time in each of said steps, and means receptive of said sampling current pulses, said bias current steps, and of said analog current signal for switching from a first state to a second state to generate an output signal only when the sum of the current from said sample pulse, said analog signal, and from said bias step exceeds a predetermined value, the value of said bias current when said output signal is generating being proportional to said analog current value.
Claim 7
Dependent Claim
166 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating trigger pulses, a first Josephson junction operative upon receipt of each of said trigger pulses for generating a sampling voltage pulse, means receiving said sampling voltage pulse for converting said voltage pulse into a sampling current pulse, means for generating steps of increasing bias current, said trigger pulse generating means being capable of generating one trigger pulse at a predetermined time in each of said steps, and a second Josephson junction receptive of said sampling current pulses, said bias current steps, and of said analog current signal, for switching from a first state to a second state to generate an output signal only when the sum of the current from said sampling pulse, said analog signal and said bias step exceeds the critical current value of said second junction, the value of said bias current when said output signal is generated being proportional to said analog current value.
Claim 8
Dependent Claim
166 words
A sampling circuit for determining the value of an analog current signal, said circuit comprising: means for generating trigger pulses, a first Josephson junction operative upon receipt of each of said trigger pulses for generating a sampling voltage pulse, means receiving said sampling voltage pulse for converting said voltage pulse into a sampling current pulse, means for generating steps of increasing bias current, said trigger pulse generating means being capable of generating one trigger pulse at a predetermined time in each of said steps, and a second Josephson junction receptive of said sampling current pulses, said bias current steps, and of said analog current signal, for switching from a first state to a second state to generate an output signal only when the sum of the current from said sampling pulse, said analog signal and said bias step exceeds the critical current value of said second junction, the value of said bias current when said output signal is generated being proportional to said analog current value.
Claim 9
Dependent Claim
111 words
A sampling circuit for determining when the value of an analog current signal exceeds a predetermined value, said circuit comprising: means for generating trigger pulses, a first Josephson junction operative upon receipt of each of said trigger pulses for generating a sampling voltage pulse, means receiving said sampling voltage pulse for converting said voltage pulse into a sampling current pulse, a second Josephson junction receptive of said sampling current pulse and of said analog current signal for switching from a first state to a second state only when the sum of the current from said sampling pulse and from said analog signal exceeds the critical current value of said second junction.
Claim 10
Dependent Claim
111 words
A sampling circuit for determining when the value of an analog current signal exceeds a predetermined value, said circuit comprising: means for generating trigger pulses, a first Josephson junction operative upon receipt of each of said trigger pulses for generating a sampling voltage pulse, means receiving said sampling voltage pulse for converting said voltage pulse into a sampling current pulse, a second Josephson junction receptive of said sampling current pulse and of said analog current signal for switching from a first state to a second state only when the sum of the current from said sampling pulse and from said analog signal exceeds the critical current value of said second junction.
Claim 11
Independent Claim
119 words
A method for determining the value of an analog current signal, said method comprising the steps of: (a) generating a trigger pulse, (b) generating a pulse of sampling current in response to the occurrence of said trigger pulse, (c) producing bias current, (d) generating an output signal only when the sum of the current from said bias current, said sampling current, and said analog current exceeds a predetermined value, (e) decreasing the bias current in response to the presence of said output signal, (f) increasing the bias current in response to the lack of said output signal, and (g) repeating steps (a) through (f) a predetermined number of cycles so that a set rate of sampling accuracy is obtained.
Claim 12
Independent Claim
119 words
A method for determining the value of an analog current signal, said method comprising the steps of: (a) generating a trigger pulse, (b) generating a pulse of sampling current in response to the occurrence of said trigger pulse, (c) producing bias current, (d) generating an output signal only when the sum of the current from said bias current, said sampling current, and said analog current exceeds a predetermined value, (e) decreasing the bias current in response to the presence of said output signal, (f) increasing the bias current in response to the lack of said output signal, and (g) repeating steps (a) through (f) a predetermined number of cycles so that a set rate of sampling accuracy is obtained.
Claim 13
Independent Claim
104 words
A method for determining the value of an analog current signal at a point in time, said method comprising the steps of: (a) generating a trigger pulse, (b) generating a pulse of sampling current in response to the occurrence of said trigger pulse, (c) producing this current, (d) generating an output signal only when the sum of the current from said bias current, said sampling current, and said analog current exceeds a predetermined value, (e) increasing the bias current a predetermined amount in response to the lack of said output signal, and (f) repeating steps (a) through (e) until said output signal is generated.
Claim 14
Independent Claim
104 words
A method for determining the value of an analog current signal at a point in time, said method comprising the steps of: (a) generating a trigger pulse, (b) generating a pulse of sampling current in response to the occurrence of said trigger pulse, (c) producing this current, (d) generating an output signal only when the sum of the current from said bias current, said sampling current, and said analog current exceeds a predetermined value, (e) increasing the bias current a predetermined amount in response to the lack of said output signal, and (f) repeating steps (a) through (e) until said output signal is generated.
Claim 15
Independent Claim
87 words
A method for determining the value of an instantaneous analog current signal, said method comprising the steps of: (a) generating a synchronously occurring trigger pulse, (b) generating a sampling current pulse in response to the occurrence of each trigger pulse, (c) producing bias current in a series of increasing current steps, and (d) generating an output signal representative of said value only when the sum of the current from said sampling current pulse, said bias current step, and said instantaneous analog current signal exceeds a predetermined value.
Claim 16
Independent Claim
87 words
A method for determining the value of an instantaneous analog current signal, said method comprising the steps of: (a) generating a synchronously occurring trigger pulse, (b) generating a sampling current pulse in response to the occurrence of each trigger pulse, (c) producing bias current in a series of increasing current steps, and (d) generating an output signal representative of said value only when the sum of the current from said sampling current pulse, said bias current step, and said instantaneous analog current signal exceeds a predetermined value.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-01-13 | 1984-07-14 | 1985-01-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-01-13 | 1988-07-14 | 1989-01-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-01-13 | 1992-07-14 | 1993-01-13 | $7700.00 | Window Closed / Lapsed |