US4242601A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit arrangement for frequency division
Assignee: US Philips Corp
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Filing: 1978-10-23
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Granted: 1980-12-30
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Expires: 1998-10-23
Abstract
Abstract A wide-band frequency divider having a first and a second group of n transistors each, with their emitters in a first cyclic sequence alternately connected to the collectors of two transistors forming an input differential pair. The base electrode of any arbitrary transistor of said first cyclic sequence is always connected to the collector of the (n-1) th transistor after said arbitrary transistor in said first sequence. The frequency divider further comprises a third and a fourth group of n transistors each, also with their emitters alternatley connected in a second cyclic sequence to the collectors of two transistors which constitute an input differential pair. The collectors of the transistors in the second sequence are each time connected to the collector of the next transistor in the first sequence. The base electrode of any arbitrary transistor of said second cyclic sequence is always connected to the collector of the n th transistor after said arbitrary transistor in that sequence.
Inventors
- 👤 Wolfdietrich G. Kasperkovitz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 09:31
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/29; H03B; H03B19/00; H03B19/06; H03B19/14
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
484 words
A circuit for frequency division comprising, first and second input terminals, first and second transistors having emitter electrodes connected in common, first and second groups of transistors with each group comprising n transistors, n being at least two, each of said transistors having a collector, a base and an emitter, means connecting the emitter electrodes of the transistors of the first and second groups to the collector electrodes of the first and the second transistor respectively, to form a first cyclic electrical sequence of transistors with said sequence alternating between said first and second groups so that each transistor of one group is followed in said sequence by a transistor of the other group, means coupling the base electrodes of the transistors of the first cyclic sequence to the collector electrodes thereof so that the base electrode of any arbitrary transistor of the first cyclic sequence is always coupled to the collector electrode of the (n-1) transistor of said first sequence after said arbitrary transistor, means coupling each collector electrode of the transistors of said first and second groups via a load to a point of reference voltage, third and fourth transistors having emitter electrodes connected in common, third and fourth groups of transistors with each group comprising the same number of n transistors as are present in the first and second groups of transistors, each of said transistors having a collector, a base and an emitter, means connecting the emitter electrodes of the transistors of the third and the fourth groups to the collector electrodes of the third and the fourth transistor respectively, to form a second cyclic electrical sequence of transistors with said second sequence alternating between said third and fourth groups so that each transistor of one group is followed in said sequence by a transistor of the other group, means coupling the base electrodes of the transistors of the third and fourth groups to the collector electrodes thereof so that the base electrode of any arbitrary transistor of the second cyclic electrical sequence is always coupled to the collector electrode of the n th transistor of said second sequence after said arbitrary transistor, means connecting the collector of a transistor of the third group to the collector of a transistor of the first group and the collector of every next transistor of the third and the fourth group in the second sequence to the collector of the next transistor of the first and the second group in the first sequence, and wherein said first, second, third and fourth transistors each have a control electrode, and means coupling said control electrodes to said first and second input terminals so that said first and second transistors and said third and fourth transistors are turned on alternately by an input signal applied to said input terminals and with the first and fourth transistors simultaneously conductive and the second and third transistors simultaneously conductive.
Claim 2
Dependent Claim
484 words
A circuit for frequency division comprising, first and second input terminals, first and second transistors having emitter electrodes connected in common, first and second groups of transistors with each group comprising n transistors, n being at least two, each of said transistors having a collector, a base and an emitter, means connecting the emitter electrodes of the transistors of the first and second groups to the collector electrodes of the first and the second transistor respectively, to form a first cyclic electrical sequence of transistors with said sequence alternating between said first and second groups so that each transistor of one group is followed in said sequence by a transistor of the other group, means coupling the base electrodes of the transistors of the first cyclic sequence to the collector electrodes thereof so that the base electrode of any arbitrary transistor of the first cyclic sequence is always coupled to the collector electrode of the (n-1) transistor of said first sequence after said arbitrary transistor, means coupling each collector electrode of the transistors of said first and second groups via a load to a point of reference voltage, third and fourth transistors having emitter electrodes connected in common, third and fourth groups of transistors with each group comprising the same number of n transistors as are present in the first and second groups of transistors, each of said transistors having a collector, a base and an emitter, means connecting the emitter electrodes of the transistors of the third and the fourth groups to the collector electrodes of the third and the fourth transistor respectively, to form a second cyclic electrical sequence of transistors with said second sequence alternating between said third and fourth groups so that each transistor of one group is followed in said sequence by a transistor of the other group, means coupling the base electrodes of the transistors of the third and fourth groups to the collector electrodes thereof so that the base electrode of any arbitrary transistor of the second cyclic electrical sequence is always coupled to the collector electrode of the n th transistor of said second sequence after said arbitrary transistor, means connecting the collector of a transistor of the third group to the collector of a transistor of the first group and the collector of every next transistor of the third and the fourth group in the second sequence to the collector of the next transistor of the first and the second group in the first sequence, and wherein said first, second, third and fourth transistors each have a control electrode, and means coupling said control electrodes to said first and second input terminals so that said first and second transistors and said third and fourth transistors are turned on alternately by an input signal applied to said input terminals and with the first and fourth transistors simultaneously conductive and the second and third transistors simultaneously conductive.
Claim 3
Dependent Claim
42 words
A circuit as claimed in claim 1 further comprising means for limiting the maximum switching speed of the transistors of the third and the fourth groups relative to the maximum switching speed of the transistors of the first and the second groups.
Claim 4
Dependent Claim
51 words
A circuit as claimed in claim 2, wherein said limiting means comprises resistance means in the base conductors of the transistors of the third and the fourth groups which is of higher value than any resistance means in the base conductors of the transistors of the first and the second group.
Claim 5
Dependent Claim
74 words
A circuit as claimed in any one of claims 1, 2 or 3 further comprising a voltage divider connected between the collectors of the first and second groups of transistors, and wherein the base electrode of any arbitrary transistor of the first and the second group is always connected to a point on said voltage divider between the collectors of the (n-2) and the (n-1) transistors after said arbitrary transistor in said first sequence.
Claim 6
Dependent Claim
72 words
A circuit as claimed in claim 4 further comprising a second voltage divider connected between the collectors of the third and fourth groups of transistors, and wherein the base electrode of any arbitrary transistor of the third and the fourth group is always connected to a point on said second voltage divider between the collector electrodes of the (n-1) and the n th transistors after said arbitrary transistor in said second sequence.
Claim 7
Dependent Claim
67 words
A circuit as claimed in any one of claims 1, 2 or 3 further comprising, a first current source connected in the common emitter circuit of the first and the second transistors, and a second current source connected in the common emitter circuit of the third and the fourth transistors and wherein the currents of said first and second current sources are adjustable relative to each other.
Claim 8
Dependent Claim
319 words
A frequency divider comprising, first and second signal input terminals, first and second transistors having emitter electrodes connected in common to a first supply terminal for a source of electric energy, means coupling a control electrode of the first and second transistors to the first and second signal input terminals respectively, whereby an input signal at said terminals alternately operates said transistors, a first group of n transistors where n is at least two, a second group of n transistors equal in number to the first group, each of said transistors having a collector, a base and an emitter, means connecting the emitters of the first group of transistors to the collector of the first transistor and the emitters of the second group of transistors to the collector of the second transistor, means intercoupling the base electrodes of the transistors of the first group to the collector electrodes of the transistors of the second group and the base electrodes of the transistors of the second group to the collector electrodes of the transistors of the first group in a given cyclic electric sequence whereby the transistors of said first and second groups are made to conduct in a given cyclic sequence in response to an input signal at the signal input terminals, said intercoupling means producing a traveling wave of collector currents propagating along the transistors in said cyclic sequence and a traveling wave of base voltages propagating along the transistors in said cyclic sequence and with a given phase shift therebetween, load means coupled to the collectors of said first and second groups of transistors, and means coupled to said signal input terminals and to the base electrodes of the transistors of said first and second groups of transistors for altering the value of said given phase shift between the collector current wave and the base voltage wave as a function of the frequency of an input signal.
Claim 9
Dependent Claim
319 words
A frequency divider comprising, first and second signal input terminals, first and second transistors having emitter electrodes connected in common to a first supply terminal for a source of electric energy, means coupling a control electrode of the first and second transistors to the first and second signal input terminals respectively, whereby an input signal at said terminals alternately operates said transistors, a first group of n transistors where n is at least two, a second group of n transistors equal in number to the first group, each of said transistors having a collector, a base and an emitter, means connecting the emitters of the first group of transistors to the collector of the first transistor and the emitters of the second group of transistors to the collector of the second transistor, means intercoupling the base electrodes of the transistors of the first group to the collector electrodes of the transistors of the second group and the base electrodes of the transistors of the second group to the collector electrodes of the transistors of the first group in a given cyclic electric sequence whereby the transistors of said first and second groups are made to conduct in a given cyclic sequence in response to an input signal at the signal input terminals, said intercoupling means producing a traveling wave of collector currents propagating along the transistors in said cyclic sequence and a traveling wave of base voltages propagating along the transistors in said cyclic sequence and with a given phase shift therebetween, load means coupled to the collectors of said first and second groups of transistors, and means coupled to said signal input terminals and to the base electrodes of the transistors of said first and second groups of transistors for altering the value of said given phase shift between the collector current wave and the base voltage wave as a function of the frequency of an input signal.
Claim 10
Dependent Claim
207 words
A frequency divider as claimed in claim 7 wherein said phase shift altering means comprises, third and fourth transistors having emitter electrodes connected in common to a second supply terminal for a source of electric energy and control electrodes coupled to the first and second signal input terminals, respectively, whereby the third and fourth transistors are alternately operated by an input signal, third and fourth groups of transistors with each said group comprising the same number of n transistors as are present in said first and second transistor groups, each of said transistors having a collector, a base and an emitter, means connecting the emitters of the third group of transistors to the collector of the third transistor and the emitters of the fourth group of transistors to the collector of the fourth transistor, means coupling the collectors of the third and fourth groups of transistors to corresponding collectors of the first and second groups of transistors, respectively, and means intercoupling the base and collector electrodes of the transistors of the third and fourth groups of transistors so that the transistors of the third and fourth groups conduct in a cyclic sequence that is out of phase with that of the first and second groups of transistors.
Claim 11
Dependent Claim
42 words
A frequency divider as claimed in claim 8 further comprising means for limiting the maximum switching speed of the transistors of the third and fourth group relative to the maximum switching speed of the transistors of the first and the second group.
Claim 12
Dependent Claim
77 words
A frequency divider as claimed in claims 7, 8 or 9 further comprising a voltage divider coupled between the collector electrodes of the transistors of said first and second groups of transistors and wherein the base electrode of any arbitrary transistor of the first and the second group is always connected to a point on said voltage divider between the collectors of the (n-2) and the (n-1) transistors following after said arbitrary transistor in said first sequence.
Claim 13
Dependent Claim
77 words
A frequency divider as claimed in claim 10 further comprising a second voltage divider coupled between the collector electrodes of the transistors of said third and fourth groups of transistors and wherein the base electrodes of any arbitrary transistor of the third and the fourth group is always connected to a point on said second voltage divider between the collector electrodes of the (n-1) and n th transistor following after said arbitrary transistor in said second sequence.
Claim 14
Dependent Claim
58 words
A frequency divider as claimed in claims 8 or 9 further comprising first and second current sources connected to the common emitter electrodes of the first and second transistors and the common emitter electrodes of the third and fourth transistors, respectively, and wherein the currents of said first and second current sources are adjustable relative to one another.
References Cited (Backward Citations)
US3728561A
Cited
US3996478A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-12-30 | 1984-06-30 | 1984-12-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-12-30 | 1988-06-30 | 1988-12-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-12-30 | 1992-06-30 | 1992-12-30 | $7700.00 | Window Closed / Lapsed |