High speed master-slave flip-flop frequency divider

Claim 2

A frequency divider including a master flip-flop and a slave flip-flop, having input means for receiving an input electronic waveform and output means for supplying an output electronic waveform, the improvement comprising: a first and second slave gating transistor, each having a control electrode, operatively connected to permit the slave flip-flop to assume the bi-stable state of the master flipflop; a first and second master gating transistor, each having a control electrode, operatively connected to permit the master flip-flop to assume a bi-stable state opposite that of the slave flip-flop; means for directly connecting the output means of the master flip-flop to the control electrodes of the first and second slave gating transistors; means for directly connecting the output means of the slave flip-flop to the control electrodes of the first and second master gating transistors; and switching means, responsive to the input electronic waveform for causing the transfer of the contents of the master flip-flop to the slave flip-flop at one polarity of the input electronic waveform, and for causing the inverse of the contents of the slave flip-flop to be transferred to the master flip-flop when the input electronic waveform is of the other polarity.

Claim 3

The invention of claim 1 wherein the circuitry of the frequency divider is of the current mode type.

Claim 4

The frequency divider of claim 2 wherein the master flip-flop is comprised of a first and second transistor, the control electrode of the first transistor being directly connected to a main electrode of the second transistor and the control electrode of the second transistor being directly connected to a main electrode of the first transistor, and wherein the slave flip-flop is comprised of a first and second transistor wherein the control electrode of the first transistor is directly connected to a main electrode of the second transistor and the control electrode of the second transistor is directly connected to a main electrode of the first transistor.

Claim 5

The frequency divider of claim 3 wherein the switching means further comprises a pair of transistors operatively connected to enable either of the first and second master gating transistors to conduct and operatively connected to enable either of the pair transistors of the slave flip-flop to conduct, and a pair of transistors operatively connected to enable either the first or second slave gating transistor to conduct and to enable either of the master flip-flop transistors to conduct.

Claim 6

A frequency divider which will divide the frequency of a wave in a range from essentially direct current to the gigaHertz range comprising: a master flip-flop and a slave flip-flop each including a pair of transistors, each transistor having a pair of main electrodes and a control electrode in which a main electrode of each transistor of a pair thereof is directly connected to the control electrode of the other transistor of the pair thereof, in which the other main electrode of each transistor of a flip-flop pair is connected to a supply terminal by way of a respective resistor, and in which the other main electrodes of the pair of transistors comprising each flip-flop pair are connected together and throuGh a main electrode path of a switching transistor which is respective to each flip-flop pair and a constant current source which is respective to each flip-flop pair to a supply terminal; a gating transistor for each flip-flop transistor, each gating transistor having a pair of main electrodes and a control electrode, a main electrode of each gating transistor being directly connected to a main electrode of a respective flip-flop transistor; direct coupling from main electrodes of the slave flip-flop transistors to respective control electrodes of the gating transistors that are coupled to master flip-flop transistors; and direct coupling from the main electrodes of the master flip-flop transistors to respective control electrodes of the gating transistors that are coupled to slave flip-flop transistors.

Claim 7

A frequency divider which will divide the frequency of a wave in a range from essentially direct current to the gigaHertz range comprising: a master flip-flop and a slave flip-flop each including a pair of transistors, each transistor having a pair of main electrodes and a control electrode in which a main electrode of each transistor of a pair thereof is directly connected to the control electrode of the other transistor of the pair thereof, in which the other main electrode of each transistor of a flip-flop pair is connected to a supply terminal by way of a respective resistor, and in which the other main electrodes of the pair of transistors comprising each flip-flop pair are connected together and throuGh a main electrode path of a switching transistor which is respective to each flip-flop pair and a constant current source which is respective to each flip-flop pair to a supply terminal; a gating transistor for each flip-flop transistor, each gating transistor having a pair of main electrodes and a control electrode, a main electrode of each gating transistor being directly connected to a main electrode of a respective flip-flop transistor; direct coupling from main electrodes of the slave flip-flop transistors to respective control electrodes of the gating transistors that are coupled to master flip-flop transistors; and direct coupling from the main electrodes of the master flip-flop transistors to respective control electrodes of the gating transistors that are coupled to slave flip-flop transistors.

Claim 8

The invention of claim 5 in which an output coupling circuit is coupled to the main electrode of said slave flip-flop said output coupling circuit comprising a first, a second and a third output transistor each having a pair of main electrodes and a control electrode, means for connecting a main electrode of said first and third output transistors to a supply terminal, means for connecting a main electrode of said second output transistor to said supply terminal by way of a resistor, means for directly connecting the control electrodes of said first and second output transistors to main electrodes of respective slave flip-flop transistors and means for connecting the junction of said resistor and the main electrode of said second output transistor to the control electrode of said third output transistor.

Claim 9

The invention of claim 5 in which the other main electrodes of said gating transistors which are coupled to the master flip-flop pair are connected together and through a main electrode path of a third switching transistor and through the constant current source for said master flip-flop.

Claim 10

The invention of claim 7 in which the other main electrodes of said gating transistors are coupled to the slave flip-flop pair are connected together and through a main electrode path of a fourth switching transistor and through the constant current source for said slave flip-flop.

Claim 11

The invention of claim 8 in which the control electrodes of said switching transistor for said master flip-flop and for the gating transistors for said slave flip-flop are connected together and in which the control electrodes of said switching transistor for said slave flip-flop and for the gating transistors for said master flip-flop are connected together.