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US4241445A
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Method and apparatus for counting transmission errors in a digital microwave link
Assignee: Societe Anonyme de Telecommunications SAT
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Filing: 1978-12-04
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Granted: 1980-12-23
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Expires: 1998-12-04
Abstract
Abstract A method of counting transmission errors in a digital microwave link with a demand of commutation onto an emergency channel when the quality of the link becomes deficient, wherein the errors are counted during a period t which is always at least equal to a value t 1 and at the most equal to a value t 2 , and which terminates when a fixed number N of errors has been detected, a pulse is stored upon each detection of N errors within a period t, and commutation is requested when n 1 pulses have been stored consecutively.
Inventors
- 👤 Georges A. Payen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 13:48
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/20; H04L1/203; H04L1/22
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
102 words
A method of counting transmission errors in a digital microwave link for producing a demand of commutation onto an emergency channel when the quality of the link becomes deficient, wherein the errors are counted during a period t which is always at least equal to a value t 1 and at most equal to a value t 2 , and which period terminates when a fixed number N of errors has been detected, a pulse is stored upon each detection of N errors within a period t, and a demand of commutation is produced when n 1 pulses have been stored consecutively.
Claim 2
Independent Claim
102 words
A method of counting transmission errors in a digital microwave link for producing a demand of commutation onto an emergency channel when the quality of the link becomes deficient, wherein the errors are counted during a period t which is always at least equal to a value t 1 and at most equal to a value t 2 , and which period terminates when a fixed number N of errors has been detected, a pulse is stored upon each detection of N errors within a period t, and a demand of commutation is produced when n 1 pulses have been stored consecutively.
Claim 3
Dependent Claim
48 words
A method as claimed in claim 1, wherein, once a demand for commutation has been produced, the reverse commutation is triggered off only when, for n 2 consecutive periods, n 2 being greater than n 1 , no detection of said number N of errors has been made.
Claim 4
Independent Claim
207 words
An apparatus for counting transmission errors in a digital microwave link, and for producing a demand of commutation onto an emergency channel when the quality of the link becomes deficient, comprising an error counter producing an error signal SA after detection of N errors, a time base operable to deliver pulses T 2 with a period of t 2 and signals T 1 of duration t 1 <t 2 triggered by said pulses, a register connected to the counter and having an enable input, means for generating a commutation demand when said register has stored n 1 consecutive error signals, and a logic circuit comprising first flip-flop means connected to said error counter and clocked by said signals T 1 and having its output connected to said error counter and said time base for resetting thereof, second flip-flop means having its clock input connected to the error counter, a first output Q connected to the enable input of the register while a second inverted output Q is connected to the time base and the error counter for resetting thereof, and third flip-flop means clocked by said pulses T 2 and connected to said error counter and having its output connected to the enable input of the register.
Claim 5
Independent Claim
207 words
An apparatus for counting transmission errors in a digital microwave link, and for producing a demand of commutation onto an emergency channel when the quality of the link becomes deficient, comprising an error counter producing an error signal SA after detection of N errors, a time base operable to deliver pulses T 2 with a period of t 2 and signals T 1 of duration t 1 <t 2 triggered by said pulses, a register connected to the counter and having an enable input, means for generating a commutation demand when said register has stored n 1 consecutive error signals, and a logic circuit comprising first flip-flop means connected to said error counter and clocked by said signals T 1 and having its output connected to said error counter and said time base for resetting thereof, second flip-flop means having its clock input connected to the error counter, a first output Q connected to the enable input of the register while a second inverted output Q is connected to the time base and the error counter for resetting thereof, and third flip-flop means clocked by said pulses T 2 and connected to said error counter and having its output connected to the enable input of the register.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-12-23 | 1984-06-23 | 1984-12-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-12-23 | 1988-06-23 | 1988-12-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-12-23 | 1992-06-23 | 1992-12-23 | $7700.00 | Window Closed / Lapsed |