US4233093A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for the manufacture of PNP transistors high power
Assignee: Individual
•
Filing: 1979-04-12
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Granted: 1980-11-11
•
Expires: 1999-04-12
Abstract
Abstract PNP high power transistors are made in high yield by a process wherein the base diffusion step is conducted in a diffusion furnace wherein phosphorus is deposited on the walls of the furnace. This results in a sharp collector to base junction.
Inventors
- 👤 Pel Chow
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 11:39
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/10; H10P32/12; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
66 words
In the process of making PNP high power transistors wherein a silicon wafer is predoped with a N-type impurity such as phosphorus and the wafer heated in a base diffusion step to diffuse the dopant into the body of the silicon, the improvement comprising carrying out said diffusion step in a heated reaction vessel wherein the walls of the vessel have been first precoated with phosphorus.
Claim 2
Dependent Claim
66 words
In the process of making PNP high power transistors wherein a silicon wafer is predoped with a N-type impurity such as phosphorus and the wafer heated in a base diffusion step to diffuse the dopant into the body of the silicon, the improvement comprising carrying out said diffusion step in a heated reaction vessel wherein the walls of the vessel have been first precoated with phosphorus.
Claim 3
Dependent Claim
26 words
The process of claim 1 including an initial step of oxidizing the surface of the wafer in a clean furnace prior to base deposition of phosphorus.
Claim 4
Dependent Claim
18 words
The process of claim 1 wherein the back side of the wafer is charged with SiO 2 .
Claim 5
Dependent Claim
46 words
The process of claim 1 wherein the wafers are first doped with phospho-, silicon oxide then deposited or capped with pure silicon oxide and then subjected to a diffusion cycle consisting of dry oxygen, steam and dry oxygen successively at a temperature of about 1200° C.
Claim 6
Dependent Claim
25 words
The process of claim 1 wherein the wafer is scored into a plurality of chips, each chip being at least 10,000 square mils in size.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-11-11 | 1984-05-12 | 1984-11-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-11-11 | 1988-05-12 | 1988-11-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-11-11 | 1992-05-12 | 1992-11-11 | $7700.00 | Window Closed / Lapsed |