US4229702A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for detecting the relative occurrence of one signal among a plurality of signals
Assignee: AT&T Teletype Corp
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Filing: 1978-10-27
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Granted: 1980-10-21
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Expires: 1998-10-27
Abstract
Abstract A circuit for detecting the relative time of occurrence of first and second signals applied to first and second terminals includes a pair of bistable flip-flops. In response to the occurrence first of the first signal the first one of the flips-flops is set to initiate the generation of a control signal. A time delay responds to the control signal and upon expiration of the time delay interval the second one of the flip-flops is set and this in turn resets the first flip-flop to terminate the control signal. In response to the first occurrence first of the second signal the second one of the flip-flops is set and this inhibits the setting of the first flip-flop. In the event that the first and second signals occur simultaneously the second flip-flop sets quickly resetting the first flip-flop. In response to either signal, a conductive path is established between the terminals.
Inventors
- 👤 James W. Thomas, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 15:11
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/26
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
131 words
A circuit for detecting the relative time of occurrence of one signal among a plurality of signals and generating a control signal in response to the occurrence first of a first one of the signals, each signal being connected to at least one of a plurality of circuit inputs, the circuit includes means responsive to the level of said first signal for generating the control signal, means responsive to the occurrence of a second one of said plurality of signals for inhibiting the control signal generating means in response to the subsequent occurrence of said first signal, the improvement. characterized by: means responsive to the occurrence of either of said first or said second signals for providing a conductive path between said first signal input terminal and said second input terminal.
Claim 2
Dependent Claim
131 words
A circuit for detecting the relative time of occurrence of one signal among a plurality of signals and generating a control signal in response to the occurrence first of a first one of the signals, each signal being connected to at least one of a plurality of circuit inputs, the circuit includes means responsive to the level of said first signal for generating the control signal, means responsive to the occurrence of a second one of said plurality of signals for inhibiting the control signal generating means in response to the subsequent occurrence of said first signal, the improvement. characterized by: means responsive to the occurrence of either of said first or said second signals for providing a conductive path between said first signal input terminal and said second input terminal.
Claim 3
Dependent Claim
37 words
The circuit of claim 1 further characterized by: means responsive to the occurrence first of said first signal for establishing the time duration of said control signal independent of the time of occurrence of said second signal.
Claim 4
Dependent Claim
29 words
The circuit of claim 2 further characterized by means responsive to the simultaneous occurrence of both said first and second signals for inhibiting the generation of said control signal.
Claim 5
Dependent Claim
127 words
A circuit for detecting the relative time of occurrence of one signal among a plurality of signals and generating a control signal in response to the occurrence first of a first one of the signals, each signal being connected to at least one of a plurality of circuit inputs, the circuit includes means responsive to the level of said first signal for generating the control signal, means responsive to the occurrence first of a second one of said plurality of signals for inhibiting the control signal generating means in response to the subsequent occurrence of said first signal characterized by: means responsive to the occurrence first of said first signal for establishing the time duration of said control signal independently of the occurrences of said second signal.
Claim 6
Dependent Claim
127 words
A circuit for detecting the relative time of occurrence of one signal among a plurality of signals and generating a control signal in response to the occurrence first of a first one of the signals, each signal being connected to at least one of a plurality of circuit inputs, the circuit includes means responsive to the level of said first signal for generating the control signal, means responsive to the occurrence first of a second one of said plurality of signals for inhibiting the control signal generating means in response to the subsequent occurrence of said first signal characterized by: means responsive to the occurrence first of said first signal for establishing the time duration of said control signal independently of the occurrences of said second signal.
Claim 7
Dependent Claim
29 words
The circuit of claim 4 further characterized by means responsive to the simultaneous occurrence of both said first and second signals for inhibiting the generation of said control signal.
Claim 8
Dependent Claim
74 words
The circuit of claim 3 further characterized by said means responsive to said first signal including a bistable flip-flop placed in its first state in response to the occurrence first of said first signal and said means responsive to the occurrence first of said second signal including a second dominant bistable flip-flop said second flip-flop serving to inhibit the operation of said first flip-flop in response to the occurrence first of said second signal.
Claim 9
Dependent Claim
21 words
The circuit of claim 6 wherein the state of said first flip-flop serves to actuate said control signal time duration means.
Claim 10
Dependent Claim
30 words
The circuit of claim 7 further characterized by said means providing a conductive path between said inputs being a bi-directional device thus allowing either signal to pass the alternate input.
Claim 11
Dependent Claim
27 words
The circuit of claim 8 further characterized by means responsive to the absence of said plurality of input signals for resetting the circuit to an initial condition.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-10-21 | 1984-04-21 | 1984-10-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-10-21 | 1988-04-21 | 1988-10-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-10-21 | 1992-04-21 | 1992-10-21 | $7700.00 | Window Closed / Lapsed |