Semiconductor device having a polycrystalline silicon diode

Claim 2

A semiconductor device comprising a monocrystalline silicon substrate and a polycrystalline silicon layer including a first polycrystalline film of one conductivity type formed on a major surface of said monocrystalline silicon substrate, and a second polycrystalline film of an opposite conductivity type formed on a surface of said first polycrystalline film so as to form a P-N junction between said first and second polycrystalline films, said P-N junction being substantially flat and parallel with said major surface of said monocrystalline silicon substrate and ending at a peripheral side surface of said polycrystalline silicon layer.

Claim 3

A semiconductor device comprising a monocrystalline silicon substrate, and a polycrystalline silicon layer including a first polycrystalline film of one conductivity type formed on a major surface of said monocrystalline silicon substrate and a second polycrystalline film of an opposite conductivity type formed on a surface of said first polycrystalline film so as to form a P-N junction between said first and second polycrystalline films, said first polycrystalline film containing a major impurity of said one conductivity type introduced thereinto from said major surface of said monocrystalline silicon substrate, said P-N junction being substantially parallel with said major surface of said monocrystalline silicon surface.

Claim 4

A semiconductor device comprising a monocrystalline silicon substrate, and a polycrystalline silicon layer including a first polycrystalline film of one conductivity type formed on a major surface of said monocrystalline silicon substrate and a second polycrystalline film of an opposite conductivity type formed on a surface of said first polycrystalline film so as to form a P-N junction between said first and second polycrystalline films, said first polycrystalline film containing a major impurity of said one conductivity type introduced thereinto from said major surface of said monocrystalline silicon substrate, said P-N junction being substantially parallel with said major surface of said monocrystalline silicon surface.

Claim 5

The semiconductor device of claim 2, further comprising an insulator film having a window therein filled with said polycrystalline silicon layer, said P-N junction being formed in said window and adjacent to the side wall surface of said window at its end line.

Claim 6

The semiconductor device of claim 3, in which said polycrystalline silicon layer extends on the surface of said insulator film.

Claim 7

The semiconductor device of claim 2, in which the thickness of said first polycrystalline film is less than that of said second polycrystalline film.

Claim 8

An integrated injection logic device comprising a semiconductor substrate of N conductivity type, an insulating film having an aperture formed on a major surface of said semiconductor substrate, first and second regions of P conductivity type selectively formed in said major surface of said semiconductor substrate, a third region of N conductivity type formed in said major surface within said second region, a polycrystalline layer formed on said major surface on said third region and within said aperture, a P-N junction being formed in said polycrystalline silicon layer in parallel with said major surface and adjacent to the side wall surface of said aperture at its end, a first electrode electrically connected to said semiconductor substrate, a second electrode electrically connected to said first region, a third electrode electrically connected to said second region, and a fourth electrode formed on a surface of said polycrystalline layer.

Claim 9

An integrated injection logic device comprising a semiconductor substrate of N conductivity type, an insulating film having an aperture formed on a major surface of said semiconductor substrate, first and second regions of P conductivity type selectively formed in said major surface of said semiconductor substrate, a third region of N conductivity type formed in said major surface within said second region, a polycrystalline layer formed on said major surface on said third region and within said aperture, a P-N junction being formed in said polycrystalline silicon layer in parallel with said major surface and adjacent to the side wall surface of said aperture at its end, a first electrode electrically connected to said semiconductor substrate, a second electrode electrically connected to said first region, a third electrode electrically connected to said second region, and a fourth electrode formed on a surface of said polycrystalline layer.