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US4225975A Expired / Lapsed US ⏱️ 0.0 years remaining

Noise suppression circuit for use with FM receiver

Assignee: Mitsubishi Electric Corp
•
Filing: 1977-09-08
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Granted: 1980-09-30
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Expires: 1997-09-08
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Abstract

Abstract Two semiconductor diodes are serially interconnected across a ratio detector in the same polarity. When the detected output from the ratio detector reaches a predetermined magnitude, both diodes are conducting and the detected output is taken from the junction of the diodes. When the detected output from the ratio detector falls due to a lower received signal level, an increase in noise level is ordinarily experienced. Because the output of the ratio detector is lower, the diodes are no longer fully conductive. This causes an increase in output impedance and a corresponding reduction in noise output.

Inventors

  • 👤 Yasuo Iwamoto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 22:26
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/02; H03D3/06; H03D3/08; H03D3/10; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/34; H03G3/348

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 118 words
A noise suppression circuit for use with an FM receiver comprising a ratio detector, a series combination formed of a plurality of semiconductor rectifier elements interconnected with the same polarity and having a central junction, each of said semiconductor rectifier elements having nonlinear forward characteristics, said series combination being connected to said ratio detector in a forward direction relative to the detected DC output therefrom to form a DC load circuit for the latter, and means for taking an audio signal from said central junction of said series combination, whereby said semiconductor rectifier elements become conducting when said detected DC output from said ratio detector exceeds a predetermined level thereby providing an audio signal from said central junction.
Claim 2
Dependent Claim 118 words
A noise suppression circuit for use with an FM receiver comprising a ratio detector, a series combination formed of a plurality of semiconductor rectifier elements interconnected with the same polarity and having a central junction, each of said semiconductor rectifier elements having nonlinear forward characteristics, said series combination being connected to said ratio detector in a forward direction relative to the detected DC output therefrom to form a DC load circuit for the latter, and means for taking an audio signal from said central junction of said series combination, whereby said semiconductor rectifier elements become conducting when said detected DC output from said ratio detector exceeds a predetermined level thereby providing an audio signal from said central junction.
Claim 3
Dependent Claim 40 words
A noise suppression circuit for use with an FM receiver as claimed in claim 1 wherein said ratio detector includes at least a load resistance and wherein said series combination is connected across said load resistance of said ratio detector.
Claim 4
Dependent Claim 25 words
A noise suppression circuit for use with an FM receiver as claimed in claim 2 wherein said load resistance is formed of a single resistor.
Claim 5
Dependent Claim 26 words
A noise suppression circuit for use with an FM receiver as claimed in claim 1 wherein each of said semiconductor rectifier elements is a semiconductor diode.
Claim 6
Dependent Claim 29 words
A noise suppression circuit for use with an FM receiver as claimed in claim 1 wherein each of said semiconductor rectifier elements has a compensation resistor serially connected thereto.
Claim 7
Dependent Claim 39 words
A noise suppression circuit for use with an FM receiver as claimed in claim 1 wherein a de-emphasis circuit is connected to said central junction of said series combination, and said audio signal is taken through said de-emphasis circuit.

References Cited (Backward Citations)

US3217257A Cited
US3265976A Cited
US3525943A Cited
US3564435A Cited
US3609554A Cited
US3622897A Cited
US3621409A Cited
US3902018A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-09-30 1984-03-31 1984-09-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-09-30 1988-03-31 1988-09-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-09-30 1992-03-31 1992-09-30 $7700.00 Window Closed / Lapsed

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