System for testing a pattern recorded on a plate

Claim 1

A system for testing a pattern recorded on a plate having two levels of modulation for a luminous analysis beam in relation to a reference pattern, the two patterns being decomposible into elementary rectangles forming lines parallel to a direction Y and following one another in a direction X perpendicular to Y, said system comprising: a first analysis system for analyzing the pattern to be tested, comprising means for projecting said analysis beam to illuminate N successive rectangles of one and the same line on said plate, imaging means introducing a magnification G and detecting means comprising N aligned detecting cells respectively optically conjugated with said N rectangles in relation to the imaging means; said detecting means supplying a series of bits S relating to the level of modulation of the illuminated rectangles; displacement means for relatively displacing said plate and said analysis system in said directions X and Y so as to effect a line-by-line analysis by bands of N rectangles width; a second analysis system for supplying a series of bits Σ relating to the reference pattern described line-by-line by bands of N rectangles; a first and second processing units for processing said bits S and Σ, respectively, which simultaneously supply selected signals relating to two homologous rectangles of the pattern to be tested and of the reference pattern and signals relating to adjacent rectangles respectively having a shift of at least one rectangle in one and the same line and a shift of at least one line in the direction Y; comparing means for comparing said selected signals and enabling any shifts of at least one rectangle and one line respectively in said directions X and Y between said two patterns to be determined and any recording errors in the pattern which cannot be attributed to a shift to be detected.

Claim 2

A system for testing a pattern recorded on a plate having two levels of modulation for a luminous analysis beam in relation to a reference pattern, the two patterns being decomposible into elementary rectangles forming lines parallel to a direction Y and following one another in a direction X perpendicular to Y, said system comprising: a first analysis system for analyzing the pattern to be tested, comprising means for projecting said analysis beam to illuminate N successive rectangles of one and the same line on said plate, imaging means introducing a magnification G and detecting means comprising N aligned detecting cells respectively optically conjugated with said N rectangles in relation to the imaging means; said detecting means supplying a series of bits S relating to the level of modulation of the illuminated rectangles; displacement means for relatively displacing said plate and said analysis system in said directions X and Y so as to effect a line-by-line analysis by bands of N rectangles width; a second analysis system for supplying a series of bits Σ relating to the reference pattern described line-by-line by bands of N rectangles; a first and second processing units for processing said bits S and Σ, respectively, which simultaneously supply selected signals relating to two homologous rectangles of the pattern to be tested and of the reference pattern and signals relating to adjacent rectangles respectively having a shift of at least one rectangle in one and the same line and a shift of at least one line in the direction Y; comparing means for comparing said selected signals and enabling any shifts of at least one rectangle and one line respectively in said directions X and Y between said two patterns to be determined and any recording errors in the pattern which cannot be attributed to a shift to be detected.

Claim 8

A system as claimed in claims 4 or 6, wherein said first processing comprises one set of n shift registers connected in series and supplied with said bits S, n being an integer such that n≧5, the capacity of each register being equal to N, said n registers sequentially suppling, at their n respective outputs, n synchroneous sequences of bits corresponding to the modulation level of the N rectangles of n successive lines; said first processing unit further comprising a first selection device selecting between n sequences, three ones: s -1 , s 0 , s 1 relating to three successive lines respectively.