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US4217562A Expired / Lapsed US ⏱️ 0.0 years remaining

Equalizer networks providing a bump shaped response

Assignee: Post Office
•
Filing: 1978-08-28
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Granted: 1980-08-12
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Expires: 1998-08-28
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Abstract

Abstract An equalizer network that exhibits stability and may be cascaded with a transmission channel is disclosed. The network includes only two operational amplifiers, resistors and capacitors and provides a bump shaped amplitude characteristic at resonance frequency. The equalizer may be modified to exhibit selectively a `bump` or `dip` at resonance, and may be so constructed that trimming operations and the independent selection of parameters is facilitated.

Inventors

  • 👤 John M. Rollett
  • 👤 Alan J. Greaves

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 06:21
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/04; H04B3/14; H04B3/143; H04B3/145

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 244 words
An active equalizer network including first and second differential input operational amplifiers, an input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point; said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input terminal of the second operational amplifier; said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier; said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal, and connected to the non-inverting input terminal of the first operational amplifier; said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input of the first operational amplifier; said output terminal being connected to the output terminal of the first operational amplifier; and the inverting input terminal of the first operational amplifier being connected to the second junction point and the inverting input terminal of the second operational amplifier being connected to the third junction point.
Claim 2
Dependent Claim 244 words
An active equalizer network including first and second differential input operational amplifiers, an input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point; said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input terminal of the second operational amplifier; said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier; said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal, and connected to the non-inverting input terminal of the first operational amplifier; said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input of the first operational amplifier; said output terminal being connected to the output terminal of the first operational amplifier; and the inverting input terminal of the first operational amplifier being connected to the second junction point and the inverting input terminal of the second operational amplifier being connected to the third junction point.
Claim 3
Dependent Claim 240 words
An active equalizer network including first and second differential input operational amplifiers, an input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point; said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input terminal of the second operational amplifier said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier; said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal; and connected to the non-inverting input terminal of the first operational amplifier; said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input terminal of the first operational amplifier; said output terminal being connected to the output terminal of the first operational amplifier; and the inverting input terminal of the first operational amplifier being connected to the second junction point and connected to the inverting input terminal of the second operational amplifier.
Claim 4
Dependent Claim 240 words
An active equalizer network including first and second differential input operational amplifiers, an input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point; said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input terminal of the second operational amplifier said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier; said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal; and connected to the non-inverting input terminal of the first operational amplifier; said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input terminal of the first operational amplifier; said output terminal being connected to the output terminal of the first operational amplifier; and the inverting input terminal of the first operational amplifier being connected to the second junction point and connected to the inverting input terminal of the second operational amplifier.
Claim 5
Dependent Claim 255 words
An active equalizer network including first and second differential input operational amplifiers, an input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point; said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input of the second operational amplifier; said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier; said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal; and connected to the non-inverting input terminal of the first operational amplifier; said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input terminal of the first operational amplifier; said output terminal being connected to the output terminal of the first operational amplifier; and the inverting input terminal of the first operational amplifier being connected to the first junction point and to the non-inverting input terminal of the second operational amplifier, and the inverting input terminal of the second operational amplifier being connected to the second junction point.
Claim 6
Dependent Claim 255 words
An active equalizer network including first and second differential input operational amplifiers, an input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point; said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input of the second operational amplifier; said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier; said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal; and connected to the non-inverting input terminal of the first operational amplifier; said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input terminal of the first operational amplifier; said output terminal being connected to the output terminal of the first operational amplifier; and the inverting input terminal of the first operational amplifier being connected to the first junction point and to the non-inverting input terminal of the second operational amplifier, and the inverting input terminal of the second operational amplifier being connected to the second junction point.
Claim 7
Dependent Claim 34 words
An active equalizer network as claimed in any one of the preceding claims including a seventh resistance element connected between said fourth junction point and the non-inverting input terminal of the first operational amplifier.
Claim 8
Dependent Claim 18 words
An active equalizer network as claimed in claim 4 wherein said seventh resistance element is a variable resistor.
Claim 9
Dependent Claim 27 words
An active equalizer network as claimed in claims 1, 2 or 3 including an eighth resistance element connected between said fourth junction point and the input terminal.
Claim 10
Dependent Claim 31 words
An active equalizer network as claimed in claim 6 wherein the eighth and fifth resistance elements comprise a single potentiometer having a variable tapping point connected to the fourth junction point.
Claim 11
Dependent Claim 31 words
An active equalizer network as claimed in claim 6 wherein the junction between the eighth and fifth resistance elements is connected to the fourth junction point via a ninth resistance element.
Claim 12
Dependent Claim 15 words
A plurality of equalizer networks as claimed in claim 3 connected in a cascade arrangement.

References Cited (Backward Citations)

US3736517A Cited
US4012704A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-08-12 1984-02-11 1984-08-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-08-12 1988-02-11 1988-08-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-08-12 1992-02-11 1992-08-12 $7700.00 Window Closed / Lapsed

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