High frequency oscillating circuit using AT cut quartz crystal vibrator

Claim 1

An oscillating circuit for use in a timepiece and the like comprising: a semiconductor substrate of one conductivity type having a high impurity concentration; an epitaxial semiconductor layer of the same conductivity type as said substrate formed on said substrate and having a low impurity concentration; a first region of the same conductivity type as the substrate formed in a surface portion of said epitaxial layer; a second region of the opposite conductivity type formed in a surface portion of said epitaxial layer around said first region and having a high impurity concentration; a third region of the same conductivity type as said second region formed in a surface portion of said epitaxial layer a short distance from said second region; a fourth region of the same conductivity type as said second region formed in a surface portion of said epitaxial layer a short distance from said third region; said substrate, first region, the portion of said epitaxial layer under said first region, and second region forming respectively the source, drain, channel and gate regions of a longitudinal junction field effect transistor; said second region, third region and the portion of said epitaxial layer between said second and third regions forming respectively the collector, emitter and base regions of one lateral transistor; and said fourth region, third region and the portion of said epitaxial layer between said third and fourth regions forming respectively the emitter, collector and base regions of another lateral transistor; a quartz crystal vibrator operable at a high oscillating frequency of more than several MHz; means including first and second capacitors connected to said vibrator for adjusting the vibrator oscillating frequency; an input terminal connected to said second region; a common output terminal connected to said first and third regions; means connecting said first capacitor between said input terminal and said substrate; and means connecting said second capacitor between said output terminal and said substrate.