US4210464A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of simultaneously controlling the lifetimes and leakage currents in semiconductor devices by hot electron irradiation through passivating glass layers
Assignee: Hitachi Ltd
•
Filing: 1978-01-31
•
Granted: 1980-07-01
•
Expires: 1998-01-31
Abstract
Abstract The whole body of a semiconductor device with its pn junction exposed ends covered by insulating glass is subjected to the exposure to radiation having an energy of higher than 0.5 MeV in terms of the reduced energy of electron beams while the semiconductor device is maintained at temperatures higher than 300 DEG C., and preferably higher than 350 DEG C. As a result, the life time of the minority carriers in the semiconductor device can be shortened without increasing the leakage current in the reverse direction.
Inventors
- 👤 Tomoyuki Tanaka
- 👤 Masahiro Okamura
- 👤 Toshikatsu Shirasawa
- 👤 Takuzo Ogawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:49
CPC Classifications
H; H10; H10P; H10P34/00; H10P34/40; H10W; H10W74/00; H10W74/01; H10W74/10; H10W74/131; H10W74/134; H10W74/137; H10W72/00
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
156 words
A method of controlling the lifetime of minority carriers in a semiconductor device without increasing the reverse leakage current in said device, wherein said semiconductor device has a semiconductor substrate including a pn junction substantially responsible for the blocking voltage of the device, said method comprising the steps of: coating an exposed end of said pn junction with a glass insulator material substantially free of alkali metal ions to provide a passivating glass layer thereon; sintering said glass material by heating said layer; and reducing said lifetime by irradiating said pn junction having said passivating glass layer with radiation capable of causing lattice defects in said semiconductor device at a temperature above 300° C. in a temperature range wherein a reverse leakage current in said substrate is made smaller than that current obtained when said pn junction is subjected to said irradiation at room temperature and wherein the electrical characteristics of said device are not deteriorated.
Claim 2
Independent Claim
156 words
A method of controlling the lifetime of minority carriers in a semiconductor device without increasing the reverse leakage current in said device, wherein said semiconductor device has a semiconductor substrate including a pn junction substantially responsible for the blocking voltage of the device, said method comprising the steps of: coating an exposed end of said pn junction with a glass insulator material substantially free of alkali metal ions to provide a passivating glass layer thereon; sintering said glass material by heating said layer; and reducing said lifetime by irradiating said pn junction having said passivating glass layer with radiation capable of causing lattice defects in said semiconductor device at a temperature above 300° C. in a temperature range wherein a reverse leakage current in said substrate is made smaller than that current obtained when said pn junction is subjected to said irradiation at room temperature and wherein the electrical characteristics of said device are not deteriorated.
Claim 3
Dependent Claim
63 words
A method as claimed in claim 1, wherein said glass material is selected from the group consisting of a ZnO-B 2 O 3 -SiO 2 system, a B 2 O 3 -PbO-SiO 2 system and a ZnO-B 2 O 3 -SiO 2 -PbO system, substantially contains no alkali metal ions and has a thermal expansion coefficient approximately equal to that of said substrate.
Claim 4
Independent Claim
19 words
A method as claimed in claim1, wherein said radiation is electron rays having energy of higher than 0.5 MeV.
Claim 5
Dependent Claim
24 words
A method as claimed in claim 1, wherein said semiconductor substrate is heated and kept at temperatures above 350° C. when irradiated with radiation.
Claim 6
Dependent Claim
23 words
A method as claimed in claim 3, wherein the irradiation dosage of said electron rays is more than 1×10 13 electrons/cm 2 .
Claim 7
Dependent Claim
40 words
A method as claimed in claim 1, wherein said semiconductor substrate is kept during irradiation at temperatures lower than the value at which said life time of carriers after irradiation becomes equal to the life time of carriers before irradiation.
Claim 8
Independent Claim
118 words
A method of controlling the lifetime of minority carriers in a semiconductor substrate having at least one pn junction that is responsible for a blocking voltage of a semiconductor device formed by said substrate, which comprises: coating an exposed end of said pn junction with a passivating glass insulator material layer that is substantially free of alkali metal ions; and reducing the lifetime by irradiating said pn junction having said passivating glass material layer with radiation capable of causing lattice defects in said semiconductor device at a temperature above 300° C. whereby a reverse leakage current in said substrate of said device is made smaller than when said pn junction is subjected to said irradiation at room temperature.
Claim 9
Independent Claim
118 words
A method of controlling the lifetime of minority carriers in a semiconductor substrate having at least one pn junction that is responsible for a blocking voltage of a semiconductor device formed by said substrate, which comprises: coating an exposed end of said pn junction with a passivating glass insulator material layer that is substantially free of alkali metal ions; and reducing the lifetime by irradiating said pn junction having said passivating glass material layer with radiation capable of causing lattice defects in said semiconductor device at a temperature above 300° C. whereby a reverse leakage current in said substrate of said device is made smaller than when said pn junction is subjected to said irradiation at room temperature.
References Cited (Backward Citations)
US3778242A
Cited
US3551171A
Cited
US3829961A
Cited
US3938178A
Cited
US3933527A
Cited
US4043837A
Cited
US4043836A
Cited
US4076555A
Cited
US4080621A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-07-01 | 1983-12-31 | 1984-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-07-01 | 1987-12-31 | 1988-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-07-01 | 1991-12-31 | 1992-07-01 | $7700.00 | Window Closed / Lapsed |