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US4205388A Expired / Lapsed US ⏱️ 0.0 years remaining

Taximeter

Assignee: CENTRODYNE CORP
•
Filing: 1977-07-18
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Granted: 1980-05-27
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Expires: 1997-07-18
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Abstract

Abstract The invention relates to a dedicated microprocessor for an electronic taximeter, and a taximeter including the microprocessor. The microprocessor includes, (a) a main memory for storing data at a plurality of storage locations therein; (b) a data memory for receiving input data at a plurality of storage locations therein; (c) a combiner for combining the data storage locations of the main memory with the input data of respective storage locations of the data memory for updating the main memory; (d) a program memory for controlling the operation of the data memory, and comprising a plurality of storage locations therein; (e) a counter for sequentially selecting the storage locations of the main memory and the program memory; and (f) clock means for driving the counter means through its cycle. The main memory means is preferably a random access memory (RAM), and the data memory means and the program memory means can comprise, respectively, first and second read only memory (ROM) means. Each of the storage locations of the RAM and the first ROM comprise four bits of information whereby a single binary coded digit (BCD) can be stored at each of the aforesaid storage locations, and the combiner is preferably a BCD adder.

Inventors

  • 👤 Jack Steiner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 19:04
CPC Classifications
G; G07; G07B; G07B13/00; G07B13/02; G07B13/08; G07B13/10; G06; G06Q; G06Q30/00; G06Q30/02; G06Q30/0283; G06Q30/0284

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 185 words
A processor for an electronic taximeter comprising: (A) a computer loop including: (1) a RAM having a plurality of updatable data storage locations therein accessible by a like plurality of addresses; (2) a DATA ROM having a plurality of preset data storage locations therein accessible by a like plurality of addresses; (3) a BCD adder receiving inputs from both said RAM and said DATA ROM to add the contents of predetermined storage locations of both; (4) a PROGRAM ROM whose output is fed to said DATA ROM; and (5) a latch receiving the output of said BCD adder and feeding an input of said RAM to thereby update said RAM with updated data from said BCD adder; (B) input multiplexer means fed to said DATA ROM; (C) means for addressing said RAM, said PROGRAM ROM, and cycling said input multiplexer means, said means comprising; (1) clock means; and (2) electronic counter means; and (D) function circuit means including said counter and connected to said clock means for signalling taximeter functions such as HIRED and TIME OFF; wherein, all calculations are performed in said computer loop.
Claim 2
Dependent Claim 185 words
A processor for an electronic taximeter comprising: (A) a computer loop including: (1) a RAM having a plurality of updatable data storage locations therein accessible by a like plurality of addresses; (2) a DATA ROM having a plurality of preset data storage locations therein accessible by a like plurality of addresses; (3) a BCD adder receiving inputs from both said RAM and said DATA ROM to add the contents of predetermined storage locations of both; (4) a PROGRAM ROM whose output is fed to said DATA ROM; and (5) a latch receiving the output of said BCD adder and feeding an input of said RAM to thereby update said RAM with updated data from said BCD adder; (B) input multiplexer means fed to said DATA ROM; (C) means for addressing said RAM, said PROGRAM ROM, and cycling said input multiplexer means, said means comprising; (1) clock means; and (2) electronic counter means; and (D) function circuit means including said counter and connected to said clock means for signalling taximeter functions such as HIRED and TIME OFF; wherein, all calculations are performed in said computer loop.
Claim 3
Dependent Claim 36 words
A processor as defined in claim 1 and further comprising; input latches means; said input data being fed to said input latches means; the output of said input latches means being fed to said input multiplexer.
Claim 4
Dependent Claim 18 words
A processor as defined in claim 1 and further comprising data display means fed from said latch means.

References Cited (Backward Citations)

US3860807A Cited
US3860806A Cited
US3931508A Cited
US3953720A Cited
US3937933A Cited
US4024384A Cited
DE2656848A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-05-27 1983-11-26 1984-05-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-05-27 1987-11-26 1988-05-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-05-27 1991-11-26 1992-05-27 $7700.00 Window Closed / Lapsed

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