Patent US4204148A successfully refreshed from Google Patents.
US4204148A
Expired / Lapsed
US
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Regulation circuit
Assignee: Esquire Inc
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Filing: 1978-07-24
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Granted: 1980-05-20
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Expires: 1998-07-24
Abstract
Abstract A regulation circuit for providing timing gate signals to the dc power section of a power supply, the regulation circuit utilizing phase angle conduction of a programmable unijunction transistor. The conduction angle is determined by the occurrence of the cycles of the ac source voltage unless earlier conduction is determined by the sensed dc voltage. Early conduction occurs when the control voltage to the PUT is allowed to build up beyond a predetermined level when the sensed dc voltage is low. When the sensed dc voltage is high, an electronic switch closes to discharge a storage element to prevent control voltage build up and, hence, early conduction. When there is an ac source voltage outage, a diode connected to the control voltage output conducts to keep the control voltage to zero and hence closing of the electronic switch to prevent undue regulation of the power section output at such times and to permit storage capacitors therein to maintain a dc output until source voltage is reestablished. Soft start elements in the form of long time constant components ensure against the application of peaked voltages during initial start up and in the presence of power surges.
Inventors
- 👤 Robert F. Gaertner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:21
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/02; H02M7/04; H02M7/12; H02M7/145; H02M7/155; H02M7/162; H02M7/1623; H02M7/1626
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
222 words
A power supply regulation circuit for providing timing gate signals to a power section of a power supply, the occurrence times of the power section gate signals determining the dc output level of the power section, comprising: a first gated semiconductor device; a second gated semiconductor device having its gate connected to said first device and connectable to a voltage source for supplying the power section gate signals at the time said second device is conductive; a first network connected to one of the terminals of said first device for supplying a control voltage to render said first device conductive by sensing the dc output level from the power section being regulated; a second network connected to another of the terminals of said first device for rendering said first device conductive, said second network supplying a reference level derived from an applied ac source voltage; said first device turning on when the relative levels of sensed dc output level and the applied reference level differ by a predetermined amount, said first network including a disconnect network connected to said ac source voltage, and absence of ac source voltage causing said reference level supplied by said second network to become zero, said absence of ac source voltage causing a disconnection of said first network to thereafter prevent operation of said first gated device.
Claim 2
Dependent Claim
222 words
A power supply regulation circuit for providing timing gate signals to a power section of a power supply, the occurrence times of the power section gate signals determining the dc output level of the power section, comprising: a first gated semiconductor device; a second gated semiconductor device having its gate connected to said first device and connectable to a voltage source for supplying the power section gate signals at the time said second device is conductive; a first network connected to one of the terminals of said first device for supplying a control voltage to render said first device conductive by sensing the dc output level from the power section being regulated; a second network connected to another of the terminals of said first device for rendering said first device conductive, said second network supplying a reference level derived from an applied ac source voltage; said first device turning on when the relative levels of sensed dc output level and the applied reference level differ by a predetermined amount, said first network including a disconnect network connected to said ac source voltage, and absence of ac source voltage causing said reference level supplied by said second network to become zero, said absence of ac source voltage causing a disconnection of said first network to thereafter prevent operation of said first gated device.
Claim 3
Dependent Claim
84 words
A power supply regulation circuit as described in claim 1, wherein said first network includes at least one time constant network including a capacitor connectable to the ac source voltage for building up said control voltage on said first-named terminal; and wherein said disconnect network includes switching means connected to the ac source voltage having a diode connected to said control voltage output of said first network, the absence of ac source voltage causing said diode to conduct and discharge said time constant network.
Claim 4
Dependent Claim
229 words
A power supply regulation circuit for providing timing gate signals to a power section of a power supply, the occurrence times of the power section gate signals determining the dc output level of the power section, comprising: a first gated semiconductor device; a second gated semiconductor device having its gate connected to said first device and connectable to a voltage source for supplying the power section gate signals at the time said second device is conductive; a first network connected to one of the terminals of said first device for supplying a control voltage to render said first device conductive by sensing the dc output level from the power section being regulated; a second network connected to another of the terminals of said first device for rendering said first device conductive, said second network supplying a reference level derived from an applied ac source voltage; said first device turning on when the relative levels of sensed dc output level and the applied reference level differ by a predetermined amount, said first network including a delayed disconnect network connected to said ac source voltage, an absence of ac source voltage causing said reference level supplied by said second network to become zero, said absence of ac source voltage for a predetermined period of time causing a disconnection of said first network to thereafter prevent operation of said first gated device.
Claim 5
Dependent Claim
229 words
A power supply regulation circuit for providing timing gate signals to a power section of a power supply, the occurrence times of the power section gate signals determining the dc output level of the power section, comprising: a first gated semiconductor device; a second gated semiconductor device having its gate connected to said first device and connectable to a voltage source for supplying the power section gate signals at the time said second device is conductive; a first network connected to one of the terminals of said first device for supplying a control voltage to render said first device conductive by sensing the dc output level from the power section being regulated; a second network connected to another of the terminals of said first device for rendering said first device conductive, said second network supplying a reference level derived from an applied ac source voltage; said first device turning on when the relative levels of sensed dc output level and the applied reference level differ by a predetermined amount, said first network including a delayed disconnect network connected to said ac source voltage, an absence of ac source voltage causing said reference level supplied by said second network to become zero, said absence of ac source voltage for a predetermined period of time causing a disconnection of said first network to thereafter prevent operation of said first gated device.
Claim 6
Dependent Claim
85 words
A power supply regulation circuit as described in claim 3, wherein said first network includes at least one time constant network including a capacitor connectable to the ac source voltage for building up said control voltage on said first-named terminal; and wherein said delayed disconnect network includes switching means connected to the ac source voltage having a diode connected to said control voltage output of said first network, the absence of ac source voltage causing said diode to conduct and discharge said time constant network.
Claim 7
Dependent Claim
148 words
A power supply regulation circuit as described in claim 3, wherein said first network includes: a first time constant network including a first capacitor connectable to the ac source voltage for building up a supply component of said control voltage on said first-named terminal; a second time constant network including a second capacitor connectable to the ac source voltage for slowly building up an operating component of said control voltage on said first-named terminal, and wherein said delayed disconnect network includes: a storage network building to a predetermined voltage level in the presence of ac source voltage, and a diode connected to said storage network and to said control voltage output of said first network, the absence of ac source voltage causing the discharge of voltage from said storage network so that, after a predetermined time, said diode conducts to discharge said first and second time constant networks.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-05-20 | 1983-11-19 | 1984-05-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-05-20 | 1987-11-19 | 1988-05-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-05-20 | 1991-11-19 | 1992-05-20 | $7700.00 | Window Closed / Lapsed |