← Back to Patent Explorer
US4201997A Expired / Lapsed US ⏱️ 0.0 years remaining

MESFET semiconductor device and method of making

Assignee: Texas Instruments Inc
•
Filing: 1978-04-21
•
Granted: 1980-05-06
•
Expires: 1998-04-21
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An improved MESFET integrated circuit device with a metal-semiconductor diode as the control element and a source and drain as other device elements is fabricated using a self-aligned gate process which consists of an implanted channel stopper underneath a thick field oxide, depletion and enhancement mode device channel implants, implanted source and drain regions, selective oxidation to form self-aligned gates, metal-semiconductor junctions as control elements, barrier metal and a thin film metallization system. The process and device structure are suited for high packing density, very low speed power product and ease of fabrication making it attractive for digital applications.

Inventors

  • 👤 Henry M. Darley
  • 👤 Theodore W. Houston
  • 👤 James B. Kruger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 03:33
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/80; H10D30/87; H10D30/0612; H10D30/0614; H10D62/00; H10D62/80; H10D62/83; H10D64/00; H10D64/60; H10D64/64; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0163; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/86; H10P; H10P76/00; H10P76/40; Y; Y10; Y10S; Y10S148/00; Y10S148/003; Y10S148/088; Y10S148/141

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 260 words
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; first, second, and third current carrying electrodes of the opposite conductivity type in surface adjacent regions of said substrate; a first high resistivity region of said opposite conductivity type in a surface adjacent region of said substrate and between and contiguous with at least one perimeter portion of said first and second current carrying electrodes; a second high resistivity region of said opposite conductivity type in a surface adjacent region of said substrate and between and contiguous with at least one perimeter portion of said second and third carrying electrodes; a first dielectric region in said substrate surrounding said device; a heavily doped region of said first conductivity type lying below and in contact with said first dielectric region; a second dielectric region in said substrate lying between said first dielectric region and overlying part of each of said current carrying electrodes and said high resistivity regions in the areas where said current carrying electrodes and said high resistivity regions are contiguous; a metal silicide region formed in each of said current carrying electrodes at least one perimeter portion of each metal silicide region lying contiguous with at least one perimeter portion of said first dielectric region; a metal silicide region in each of said first and second high resistivity regions, the ends of said metal silicide regions in said high resistivity regions lying contiguous with a perimeter portion of said first dielectric region, each of said metal silicide regions creating a metal-semiconductor junction as a control element.
Claim 2
Dependent Claim 260 words
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; first, second, and third current carrying electrodes of the opposite conductivity type in surface adjacent regions of said substrate; a first high resistivity region of said opposite conductivity type in a surface adjacent region of said substrate and between and contiguous with at least one perimeter portion of said first and second current carrying electrodes; a second high resistivity region of said opposite conductivity type in a surface adjacent region of said substrate and between and contiguous with at least one perimeter portion of said second and third carrying electrodes; a first dielectric region in said substrate surrounding said device; a heavily doped region of said first conductivity type lying below and in contact with said first dielectric region; a second dielectric region in said substrate lying between said first dielectric region and overlying part of each of said current carrying electrodes and said high resistivity regions in the areas where said current carrying electrodes and said high resistivity regions are contiguous; a metal silicide region formed in each of said current carrying electrodes at least one perimeter portion of each metal silicide region lying contiguous with at least one perimeter portion of said first dielectric region; a metal silicide region in each of said first and second high resistivity regions, the ends of said metal silicide regions in said high resistivity regions lying contiguous with a perimeter portion of said first dielectric region, each of said metal silicide regions creating a metal-semiconductor junction as a control element.
Claim 3
Dependent Claim 16 words
A device according to claim 1 wherein said first and second dielectric regions are silicon dioxide.
Claim 4
Dependent Claim 14 words
A device according to claim 2 wherein said metal silicide regions are platinum silicide.
Claim 5
Dependent Claim 20 words
A device according to claim 3 wherein said second dielectric region has apertures for contacts to said metal silicide regions.
Claim 6
Dependent Claim 16 words
A device according to claim 4 further including a metallization system covering said metal silicide regions.
Claim 7
Dependent Claim 24 words
A device according to claim 5 wherein said metallization system is composed of a first layer of titanium-tungsten and a second layer of aluminum.

References Cited (Backward Citations)

US4104672A Cited
US4139786A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-05-06 1983-11-05 1984-05-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-05-06 1987-11-05 1988-05-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-05-06 1991-11-05 1992-05-06 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag