US4194135A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic signal level translating circuitry
Assignee: International Business Machines Corp
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Filing: 1978-06-30
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Granted: 1980-03-18
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Expires: 1998-06-30
Abstract
Abstract This circuitry translates a relatively large voltage bi-level logical signal to an inphase relatively low voltage bi-level signal for bistatic current-switching logical circuitry. A transistor is connected in the common base circuit arrangement for a first order of input-output circuit isolation. Substantially complete isolation is afforded by a reference tracking circuit which is arranged to track exactly for temperature, base-to-emitter voltage and process variations. This circuit provides a potential at the base of the transistor which is the sum of the emitter-to-base voltage drop and one half of the applied energizing potential. The proper base potential is effected by simple adjustment of the ratio of the value of the input resistor to the value of the load resistor. Many such circuits may be operated on a single semiconductor chip.
Inventors
- 👤 Warren A. Christopherson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 04:02
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0175; H03K19/018; H03K19/01806; H03K17/00; H03K17/30
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
167 words
Electronic signal level translating circuitry, comprising a transistor having emitter, collector and base electrodes, an output circuit including a load resistor connected to the collector electrode of said transistor, an input circuit including an input resistor connected solely to but one of the other electrodes of said transistor, a reference potential regulating circuit including one terminal connected to a point of fixed energizing potential, one terminal connected to another of the electrodes of said transistor, and another terminal connected to a point of fixed reference potential, said reference circuit comprising at least two diodes and at least two resistors of equal value connected in series between said points of fixed potential with said other electrode of said transistor connected to the junction between one of said diodes and one of said resistors having one terminal thereof connected to said point of fixed energizing potential, and the p-n junctions of each of said diodes having the same characteristics as that of the emitter-base p-n junction of said transistor.
Claim 2
Dependent Claim
167 words
Electronic signal level translating circuitry, comprising a transistor having emitter, collector and base electrodes, an output circuit including a load resistor connected to the collector electrode of said transistor, an input circuit including an input resistor connected solely to but one of the other electrodes of said transistor, a reference potential regulating circuit including one terminal connected to a point of fixed energizing potential, one terminal connected to another of the electrodes of said transistor, and another terminal connected to a point of fixed reference potential, said reference circuit comprising at least two diodes and at least two resistors of equal value connected in series between said points of fixed potential with said other electrode of said transistor connected to the junction between one of said diodes and one of said resistors having one terminal thereof connected to said point of fixed energizing potential, and the p-n junctions of each of said diodes having the same characteristics as that of the emitter-base p-n junction of said transistor.
Claim 3
Dependent Claim
50 words
Electronic signal level translating circuitry as defined in claim 1 and wherein said input and said load resistors have values of resistance at which the potential at said one electrode is equal to the sum of one half said energizing potential applied and the base-to-emitter voltage drop of said transistor.
Claim 4
Dependent Claim
20 words
Electronic signal level translating circuitry as defined in claim 1 and incorporating a semiconductor diode connected across said input circuit.
Claim 5
Dependent Claim
20 words
Electronic signal level translating circuitry as defined in claim 1 and incorporating a semiconductor diode connected across said output circuit.
Claim 6
Dependent Claim
37 words
Electronic signal level translating circuitry as defined in claim 1, and wherein said circuitry having a given voltage gain, said input resistor and said load resistor are related in proportion to the voltage gain of said circuitry.
Claim 7
Dependent Claim
36 words
Electronic signal level translating circuitry as defined in claim 1, and wherein the potential at said other electrode is equal to the sum of the base-to-emitter voltage drop and one half of the applied energizing potential.
Claim 8
Dependent Claim
159 words
Electronic signal level translating circuitry, comprising signal input terminals, signal output terminals, a transistor having a collector, an emitter and a base electrode, an input resistor connected for direct current flow between one of said input terminals and said emitter electrode of said transistor only, a load resistor connected between a point of fixed energizing potential and in common with said collector electrode of said transistor and one of said output terminals, one resistor, a pair of semiconductor diodes and another resistor connected in series between said point of fixed energizing potential and a point of fixed reference potential for said input and output terminals and said energizing potential, said one and said other resistors having equal resistance values, and each of said diodes and the emitter-base junction of said transistor are of substantially the same characteristic structure, and said base electrode of said transistor being directly connected to the junction between said one resistor and the contiguous diode.
Claim 9
Dependent Claim
159 words
Electronic signal level translating circuitry, comprising signal input terminals, signal output terminals, a transistor having a collector, an emitter and a base electrode, an input resistor connected for direct current flow between one of said input terminals and said emitter electrode of said transistor only, a load resistor connected between a point of fixed energizing potential and in common with said collector electrode of said transistor and one of said output terminals, one resistor, a pair of semiconductor diodes and another resistor connected in series between said point of fixed energizing potential and a point of fixed reference potential for said input and output terminals and said energizing potential, said one and said other resistors having equal resistance values, and each of said diodes and the emitter-base junction of said transistor are of substantially the same characteristic structure, and said base electrode of said transistor being directly connected to the junction between said one resistor and the contiguous diode.
Claim 10
Dependent Claim
25 words
Electronic signal level translating circuitry as defined in claim 7, and incorporating a semiconductor diode interconnecting said signal input terminals for clamping excessive input signal.
Claim 11
Dependent Claim
31 words
Electronic signal level translating circuitry as defined in claim 7 and incorporating a semiconductor diode shunted across said load resistor for preventing saturation of said transistor on excessively low input signal.
Claim 12
Dependent Claim
50 words
Electronic signal level translating circuitry as defined in claim 7 and wherein said input and said load resistors have resistance values at which the potential at said base electrode is equal to the sum of the base-to-emitter drop of said transistor and one half the value of said energizing potential.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-03-18 | 1983-09-17 | 1984-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-03-18 | 1987-09-17 | 1988-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-03-18 | 1991-09-17 | 1992-03-18 | $7700.00 | Window Closed / Lapsed |