Patent US4180786A successfully refreshed from Google Patents.
US4180786A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Impedance-matching circuit using negative low-noise resistance
Assignee: Raytheon Co
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Filing: 1978-07-31
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Granted: 1979-12-25
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Expires: 1998-07-31
Abstract
Abstract A circuit is disclosed for impedance matching an electrical signal-generating transducer to an electrical signal-processing amplifier while substantially retaining both the original signal-to-noise power ratio and the original signal amplitude at the input to the amplifier. A load resistance of a value substantially equal to twice the characteristic resistance of the transducer is coupled across the amplifier input, while a negative low-noise resistance approximately equal in magnitude to the source resistance is coupled in series with the load resistance. A transmission line having a characteristic impedance approximately equal to the transducer resistance is coupled between the transducer output and the series-coupled load resistance and negative resistance.
Inventors
- 👤 Robert L. Forward
- 👤 Gary D. Thurmond
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 00:57
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/28
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
93 words
A circuit for impedance matching electrical signal-processing circuitry having first and second input terminals to a source of electrical signals having first and second output terminals and a given characteristic source resistance comprising: means coupled between said first and second input terminals for providing a load resistance approximately equal to twice said source resistance; means coupled between said second input terminal and said second output terminal for providing a negative low-noise resistance approximately equal in magnitude to said source resistance; and means for intercoupling said first output terminal and said first input terminal.
Claim 2
Dependent Claim
93 words
A circuit for impedance matching electrical signal-processing circuitry having first and second input terminals to a source of electrical signals having first and second output terminals and a given characteristic source resistance comprising: means coupled between said first and second input terminals for providing a load resistance approximately equal to twice said source resistance; means coupled between said second input terminal and said second output terminal for providing a negative low-noise resistance approximately equal in magnitude to said source resistance; and means for intercoupling said first output terminal and said first input terminal.
Claim 3
Dependent Claim
101 words
A circuit for impedance matching electrical signal-processing circuitry having first and second input terminals to a source of electrical signals having first and second output terminals and a given characteristic source resistance comprising: means coupled between said first and second input terminals for providing a load resistance approximately equal to twice said source resistance; means coupled between said second input terminal and a further terminal for providing a negative low-noise resistance approximately equal in magnitude to said source resistance; and means for intercoupling said first output terminal with said first input terminal and said second output terminal with said further terminal.
Claim 4
Dependent Claim
101 words
A circuit for impedance matching electrical signal-processing circuitry having first and second input terminals to a source of electrical signals having first and second output terminals and a given characteristic source resistance comprising: means coupled between said first and second input terminals for providing a load resistance approximately equal to twice said source resistance; means coupled between said second input terminal and a further terminal for providing a negative low-noise resistance approximately equal in magnitude to said source resistance; and means for intercoupling said first output terminal with said first input terminal and said second output terminal with said further terminal.
Claim 5
Dependent Claim
24 words
A circuit according to claim 2 wherein the last-named means includes a transmission line having a characteristic impedance approximately equal to said source resistance.
Claim 6
Dependent Claim
23 words
A circuit according to any of claim 1, 2 or 3 wherein said means for providing said negative low-noise resistance includes a desorbor.
Claim 7
Dependent Claim
32 words
A circuit according to any of claims 1, 2 or 3 wherein said source of electrical signals includes a transducer providing an electrical output signal between said first and second output terminals.
Claim 8
Dependent Claim
26 words
A circuit according to any of claims 1, 2 or 3 wherein said electrical signal-processing circuitry includes an amplifier having said first and second input terminals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-12-24 | 1983-06-25 | 1983-12-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-12-24 | 1987-06-25 | 1987-12-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-12-24 | 1991-06-25 | 1991-12-25 | $7700.00 | Window Closed / Lapsed |