Booster circuit for electronic timepiece

Claim 2

In an electronic timepiece having a power supply with first and second terminals and providing a battery voltage potential, and a source of clock pulses, a booster circuit for converting said battery voltage potential to a plurality of boosted output voltages, comprising: boosting circuit means including a plurality of pairs of boosting diodes connected in series with the first terminal of said power supply and having outputs, respectively, a plurality of first capacitors each having one terminal connected to a junction of one of said pairs of said boosting diodes and another terminal connected to said source of clock pulses, a plurality of second capacitors each having one terminal connected to an input of one of said pairs of boosting diodes and another terminal coupled to the second terminal of said power supply, and a plurality of output leads on which said plurality of boosted output voltages appear, respectively, each of said output leads being connected between an input of one of said pairs of boosting diodes and one of said plurality of second capacitors; and voltage compensating means connected to said second terminal of the power supply and adapted such that the current flow therethrough which is dependent upon said plurality of boosted output voltages produced by said boosting circuit means compensates for an unbalance of said plurality of boosted output voltages applied to said plurality of output leads.

Claim 3

In an electronic timepiece according to claim 1, in which said voltage compensating means comprises voltage dropping diodes connected in series with said second terminal of said power supply, and a capacitor connected in parallel with said voltage dropping diodes.

Claim 4

In an electronic timepiece, the combination comprising a power supply with first and second terminals and providing a battery voltage potential, a source of clock pulses, and a booster circuit means for converting said battery voltage potential to a plurality of boosted output voltages, said boosting circuit means comprising: a plurality of pairs of boosting diodes connected in series with the first terminal of said power supply and having outputs, respectively, a plurality of first capacitors each having one terminal connected to a junction of one of said pairs or said boosting diodes and another terminal connected to said source of clock pulses, a plurality of second capacitors each having one terminal connected to an input of one of said pairs of boosting diodes and another terminal coupled to the second terminal of said power supply, and a plurality of output leads on which said plurality of boosted output voltages appear, respectively, each of said output leads being connected between an input of one of said pairs of boosting diodes and one of said plurality of second capacitors; and voltage compensating means connected to said second terminal of the power supply and adapted such that the current flow therethrough which is dependent upon said plurality of boosted output voltages produced by said boosting circuit means compensates for an unbalance of said plurality of boosted output voltages applied to said plurality of output leads; said source of clock pulses being an oscillator comprising a plurality of series connected inverting amplifiers, including an output inverting amplifier stage having an input side and an output side adapted to produce, amplify and shape a rectangular wave output signal, a variable capacitor connected to the input side of said output inverting amplifier stage and a variable resistor connected with the output side of said output inverting amplifier stage, said variable capacitor and said variable resistor enabling control of the output frequency for potential adjustment of said boosted output voltages.

Claim 5

In an electronic timepiece, the combination comprising a power supply with first and second terminals and providing a battery voltage potential, a source of clock pulses, and a booster circuit means for converting said battery voltage potential to a plurality of boosted output voltages, said boosting circuit means comprising: a plurality of pairs of boosting diodes connected in series with the first terminal of said power supply and having outputs, respectively, a plurality of first capacitors each having one terminal connected to a junction of one of said pairs or said boosting diodes and another terminal connected to said source of clock pulses, a plurality of second capacitors each having one terminal connected to an input of one of said pairs of boosting diodes and another terminal coupled to the second terminal of said power supply, and a plurality of output leads on which said plurality of boosted output voltages appear, respectively, each of said output leads being connected between an input of one of said pairs of boosting diodes and one of said plurality of second capacitors; and voltage compensating means connected to said second terminal of the power supply and adapted such that the current flow therethrough which is dependent upon said plurality of boosted output voltages produced by said boosting circuit means compensates for an unbalance of said plurality of boosted output voltages applied to said plurality of output leads; said source of clock pulses being an oscillator comprising a plurality of series connected inverting amplifiers, including an output inverting amplifier stage having an input side and an output side adapted to produce, amplify and shape a rectangular wave output signal, a variable capacitor connected to the input side of said output inverting amplifier stage and a variable resistor connected with the output side of said output inverting amplifier stage, said variable capacitor and said variable resistor enabling control of the output frequency for potential adjustment of said boosted output voltages.

Claim 6

In an electronic timepiece according to claim 3, in which the threshold voltage of said output inverting amplifier stage is selected to be substantially equal to the output voltage of said power supply.