Gray code reader

Claim 1

A gray code reader, comprising a code plate having gray code bits, parity bits and parity check control bits arranged side by side, said parity check control bits consisting of first bits representing one binary level and lying respectively across the boundaries of the adjoining gray code bits and second bits representing the other binary level and occupying the remaining portions between said first bits, gray code bit reading means arranged in correspondence with the respective bits of said gray code bits for reading said gray code bits, a decoder for decoding the output of said gray code bit reading means, parity bit reading means and parity check control bit reading means arranged respectively in correspondence with said parity bits and parity check control bits for reading said bits respectively, a parity check circuit for receiving the output of said gray code bit reading means and parity bit reading means and executing parity check operation said parity check control bit reading means producing a first warning signal upon sensing of said first bits and said parity check circuit producing a second warning signal when the parity is incorrect, a memory for temporarily storing the output of said decoder, a subtractor for producing a difference between the content of said memory and the output of said decoder, a first comparator for comparing said difference with a predetermined value and producing a third warning signal when the difference is greater than the other, memory control means for interrupting the input of said memory in response to at least one of said first and second warning signals, first error indicating means for producing an error signal in response to said second warning signal only in the absence of said first warning signal, and second error indicating means for producing an error signal in response to at least both of said first and third warning signal.