Patent US4171537A successfully refreshed from Google Patents.
US4171537A
Expired / Lapsed
US
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Number oriented processor
Assignee: National Semiconductor Corp
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Filing: 1978-01-09
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Granted: 1979-10-16
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Expires: 1998-01-09
Abstract
Abstract An MOS/LSI Number Oriented Processor is provided which is intended for number processing applications. The single chip device provides arithmetic, logarithmic and transcendental functions, test and branch capability, internal number storage and input/output capability. The Number Oriented Processor uses ROM library means to store routines for performing the required functions. The desired function is selected from the library by macro instruction means from an external ROM, RAM or microprocessor. The Number Oriented Processor can be used as a stand-alone processor with external ROM/PROM (or RAM) and program counter; or, it can be configured as a peripheral device on the bus of a microprocessor or minicomputer.
Inventors
- 👤 Alan J. Weissberger
- 👤 Ted W. Toal
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 23:12
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/76; G06F15/80; G06F15/8007; G06F15/02; G06F7/00; G06F7/38; G06F7/48; G06F7/483
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
220 words
A number processor for providing digit data and digit position and adapted to be coupled to and controlled by a first microprocessor means wherein said first microprocessor means provides MACRO instructions, timing and control information directly to the control logic of said number processor in the form of digital signals to synchronize said number processor with said first microprocessor means, comprising: a second microprocessor having fixed storage library read-only memory means separate from said first microprocessor means for providing a storage library permitting mathematical computations including at least arithmetic, trigonometric and logarithmic type computations; data and MACRO instruction input means coupled to said second microprocessor and responsive to said control information for initiating a desired mathematical computation; data output means coupled to said second microprocessor for providing results of said mathematical computation in the form of a plurality of digital signals representing digit position, digit data and control outputs; data and MACRO instruction receiving means coupled to said first microprocessor means for directly receiving both said MACRO instructions and data in the form of a plurality of digital signals from said first microprocessor means; and selection means coupled to said receiving means for selecting from said fixed storage library read-only memory means a specific portion of said storage library to execute the desired mathematical computation directly from said receiving means.
Claim 2
Dependent Claim
220 words
A number processor for providing digit data and digit position and adapted to be coupled to and controlled by a first microprocessor means wherein said first microprocessor means provides MACRO instructions, timing and control information directly to the control logic of said number processor in the form of digital signals to synchronize said number processor with said first microprocessor means, comprising: a second microprocessor having fixed storage library read-only memory means separate from said first microprocessor means for providing a storage library permitting mathematical computations including at least arithmetic, trigonometric and logarithmic type computations; data and MACRO instruction input means coupled to said second microprocessor and responsive to said control information for initiating a desired mathematical computation; data output means coupled to said second microprocessor for providing results of said mathematical computation in the form of a plurality of digital signals representing digit position, digit data and control outputs; data and MACRO instruction receiving means coupled to said first microprocessor means for directly receiving both said MACRO instructions and data in the form of a plurality of digital signals from said first microprocessor means; and selection means coupled to said receiving means for selecting from said fixed storage library read-only memory means a specific portion of said storage library to execute the desired mathematical computation directly from said receiving means.
Claim 3
Dependent Claim
24 words
A number processor in accordance with claim 1 wherein said microprocessor having fixed storage library read-only memory means comprises a single integrated circuit chip.
Claim 4
Dependent Claim
25 words
A number processor in accordance with claim 1 wherein said microprocessor having fixed storage library read-only memory means comprises a single MOS integrated circuit chip.
Claim 5
Dependent Claim
21 words
A number processor in accordance with claim 1 wherein said fixed storage library read-only memory means comprises a semiconductor read-only memory.
Claim 6
Dependent Claim
22 words
A number processor in accordance with claim 1 wherein said fixed storage library read-only memory means comprises an MOS semiconductor read-only memory.
Claim 7
Dependent Claim
33 words
A number processor in accordance with claim 1 wherein said storage library permitting mathematical computations including at least arithmetic, trigonometric and logarithmic type computations comprises microprogram means for providing control and information processing.
Claim 8
Dependent Claim
40 words
A number processor in accordance with claim 1 wherein said data input means coupled to said first microprocessor means for initiating under external control a desired mathematical computation comprises input means for providing external MACRO instructions, data and control information.
Claim 9
Dependent Claim
42 words
A number processor in accordance with claim 1 wherein said data input means coupled to said first microprocessor means for initiating under external control a desired mathematical computation comprises combined input means for providing both external MACRO instructions and data and control.
Claim 10
Dependent Claim
25 words
A number processor in accordance with claim 1 wherein said selection means comprises microinstruction program means for providing instruction inputs, control inputs and control outputs.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-10-15 | 1983-04-16 | 1983-10-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-10-15 | 1987-04-16 | 1987-10-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-10-15 | 1991-04-16 | 1991-10-16 | $7700.00 | Window Closed / Lapsed |