Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
235 words
An improved multiplier circuit for providing an analog output signal which is proportional to the product of two binary numbers including: a first digital-to-analog converter means for receiving a binary input and for producing a reference output voltage proportional to the binary input; a second digital-to-analog converter, said second digital-to-analog circuit including an input reference resistor; a current ladder means including a plurality of transistors for controlling the magnitude of current flow at successive binary digit flow points in said ladder in accordance with the reference output voltage applied to said reference resistor from said first digital-to-analog converter, wherein the improvement involves an improved circuit for biasing said ladder current control transistors comprising: first and second transistors connected to receive current in parallel from said reference resistor; third and fourth mirror connected transistors connected respectively in series with said first and second transistors to insure substantially proportional flow of current in the two parallel paths including said first and third, and said second and fourth transistors; means including a fifth transistor having its emitter-to-base circuit connected from a fixed voltage level to the emitter-to-base circuit of said first transistor and its collector to the collector of said first transistor, to hold the output from said reference resistor virtually at said fixed voltage level; and means for supplying bias current from the bases of said mirror-connected third and fourth transistors to said ladder current control transistors.
Claim 2
Dependent Claim
235 words
An improved multiplier circuit for providing an analog output signal which is proportional to the product of two binary numbers including: a first digital-to-analog converter means for receiving a binary input and for producing a reference output voltage proportional to the binary input; a second digital-to-analog converter, said second digital-to-analog circuit including an input reference resistor; a current ladder means including a plurality of transistors for controlling the magnitude of current flow at successive binary digit flow points in said ladder in accordance with the reference output voltage applied to said reference resistor from said first digital-to-analog converter, wherein the improvement involves an improved circuit for biasing said ladder current control transistors comprising: first and second transistors connected to receive current in parallel from said reference resistor; third and fourth mirror connected transistors connected respectively in series with said first and second transistors to insure substantially proportional flow of current in the two parallel paths including said first and third, and said second and fourth transistors; means including a fifth transistor having its emitter-to-base circuit connected from a fixed voltage level to the emitter-to-base circuit of said first transistor and its collector to the collector of said first transistor, to hold the output from said reference resistor virtually at said fixed voltage level; and means for supplying bias current from the bases of said mirror-connected third and fourth transistors to said ladder current control transistors.
Claim 3
Dependent Claim
35 words
A circuit as defined in claim 1 wherein said fixed voltage level is ground, whereby the potential of the circuit point between said reference resistor and said first and second transistors is a virtual ground.
Claim 4
Dependent Claim
19 words
A circuit as defined in claim 1 wherein the base and collector of said fourth transistor are connected together.
Claim 5
Dependent Claim
41 words
A circuit as defined in claim 1 wherein means are provided for supplying current to the collector of said third transistor from both said first and fifth transistors, and wherein the bases of said third and fourth transistors are connected together.
Claim 6
Dependent Claim
25 words
A circuit as defined in claim 1 wherein resistance means are provided for equalizing the potential at the collectors of said third and fourth transistors.
Claim 7
Dependent Claim
25 words
A circuit as defined in claim 4 further comprising means including emitter follower connected transistors for compensating for base current loss of said other transistors.
Claim 8
Dependent Claim
154 words
An improved transistor circuit for providing an electrical signal which is proportional to an applied input signal comprising: means for providing a reference input voltage; a load circuit; an input reference impedance coupled to receive said input voltage; first and second transistors connected to receive current in parallel from said reference impedance; third and fourth mirror connected transistors connected respectively in series with said first and second transistors to insure substantially proportional flow of current in the two parallel paths including said first and third, and said second and fourth transistors; means including a fifth transistor having its emitter-to-base circuit connected from a fixed voltage level to the emitter-to-base circuit of said first transistor and its collector to the collector of said first transistor, to hold the output from said reference resistor virtually at said fixed voltage level; and means for supplying current from said mirror-connected third and fourth transistors to said load circuit.
Claim 9
Dependent Claim
154 words
An improved transistor circuit for providing an electrical signal which is proportional to an applied input signal comprising: means for providing a reference input voltage; a load circuit; an input reference impedance coupled to receive said input voltage; first and second transistors connected to receive current in parallel from said reference impedance; third and fourth mirror connected transistors connected respectively in series with said first and second transistors to insure substantially proportional flow of current in the two parallel paths including said first and third, and said second and fourth transistors; means including a fifth transistor having its emitter-to-base circuit connected from a fixed voltage level to the emitter-to-base circuit of said first transistor and its collector to the collector of said first transistor, to hold the output from said reference resistor virtually at said fixed voltage level; and means for supplying current from said mirror-connected third and fourth transistors to said load circuit.
Claim 10
Dependent Claim
35 words
A circuit as defined in claim 7 wherein said fixed voltage level is ground, whereby the potential of the circuit point between said reference impedance and said first and second transistors is a virtual ground.
Claim 11
Dependent Claim
19 words
A circuit as defined in claim 7 wherein the base and collector of said fourth transistor are connected together.
Claim 12
Dependent Claim
41 words
A circuit as defined in claim 7 wherein means are provided for supplying current to the collector of said third transistor from both said first and fifth transistors, and wherein the bases of said third and fourth transistors are connected together.
Claim 13
Dependent Claim
25 words
A circuit as defined in claim 7 wherein resistance means are provided for equalizing the potential at the collectors of said third and fourth transistors.
Claim 14
Dependent Claim
25 words
A circuit as defined in claim 10 further comprising means including emitter follower connected transistors for compensating for base current loss of said other transistors.
Claim 15
Dependent Claim
43 words
A circuit as defined in claim 7 wherein the bases of said first and fifth transistors are connected together, the emitter of said first transistor is connected to said input reference impedance, and the emitter of said fifth transistor is connected to ground.