Patent US4166271A successfully refreshed from Google Patents.
US4166271A
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Digital recognition circuits
Assignee: Independent Broadcasting Authority
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Filing: 1977-12-23
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Granted: 1979-08-28
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Expires: 1997-12-23
Abstract
Abstract A circuit for monitoring digital data in the form of words comprising a plurality of digits comprises a shift register through which the digital data is fed and one or more memory devices arranged to compare the data in the shift register with predetermined data stored in the memory device or devices. The memory device or devices produce a numerical count of the number of digits either which are correct or which are incorrect and that number is compared by a comparison circuit with a reference value in order to control dumping or further processing of the data.
Inventors
- 👤 Alan C. Thirlwall
- 👤 John G. S. Ive
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 10:48
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/24; H04N7/52; H04N7/54; H04N7/56
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
118 words
Apparatus for detecting a predetermined sequence of binary digits, comprising (a) storage means (11) adapted to receive a succession of binary digits, said storage means including a plurality of sections each having an output; (b) recognition means including at least one programmable memory device (12,13) having inputs connected with the outputs of the storage means sections, said memory device having predetermined data stored therein and being operable to produce a numerical output signal indicative of the number of correct digits stored by said storage means; (c) means for supplying a reference signal; and (d) comparison means (16) for comparing said numerical output signal with said reference signal and for producing an indication of the result of the comparison.
Claim 2
Dependent Claim
118 words
Apparatus for detecting a predetermined sequence of binary digits, comprising (a) storage means (11) adapted to receive a succession of binary digits, said storage means including a plurality of sections each having an output; (b) recognition means including at least one programmable memory device (12,13) having inputs connected with the outputs of the storage means sections, said memory device having predetermined data stored therein and being operable to produce a numerical output signal indicative of the number of correct digits stored by said storage means; (c) means for supplying a reference signal; and (d) comparison means (16) for comparing said numerical output signal with said reference signal and for producing an indication of the result of the comparison.
Claim 3
Dependent Claim
68 words
Apparatus as defined in claim 1, wherein a plurality of memories are provided, said storage means comprising a shift register having a plurality of outputs a first group of which are connected with the inputs of a first memory, a second group of outputs being connected with a second memory, and further including adding means (15) connected with the outputs of said memories for producing said output signal.
Claim 4
Dependent Claim
22 words
Apparatus as defined in claim 2, and further including digital switch means (14) connected between said storage means and said recognition means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-08-27 | 1983-02-26 | 1983-08-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-08-27 | 1987-02-26 | 1987-08-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-08-27 | 1991-02-26 | 1991-08-28 | $7700.00 | Window Closed / Lapsed |