US4160934A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current control circuit for light emitting diode
Assignee: AT&T Inc
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Filing: 1977-08-11
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Granted: 1979-07-10
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Expires: 1997-08-11
Abstract
Abstract The current in a semiconductive light emitting diode (LED), driven by an insulated gate field effect transistor (IGFET) switch, is stabilized by a current control circuit including a comparator type feedback network, which stabilizes the voltage at a node located between said switch and the series connection of a ballast resistor and the LED.
Inventors
- 👤 Howard C. Kirsch
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 09:37
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
226 words
Semiconductor apparatus which comprises: (a) a first transistor drive having a high current carrying terminal connected to an output terminal; (b) a comparator feedback control network including first and second feedback terminals and fourth and sixth transistors each having a pair of high current carrying terminals and a low current carrying terminal, the first feedback terminal connected to a low current carrying control terminal of said first transistor driver and the second feedback terminal connected to said high current carrying terminal, said second feedback terminal for connection thereto of a controlled device, one of the high current carrying terminals of the fourth transistor being connected to one of the high current carrying terminals of the sixth transistor, the low current carrying terminal of the sixth transistor being connected to the second feedback terminal, and the other of the high current carrying terminals of the fourth transistor being connected to the first feedback terminal, the low current carrying terminal of the fourth transistor being connectd to a terminal for the application thereto of a reference potential; and (c) input signal means, operative on the first feedback terminal, for maintaining said driver in its "off" state in response to a first input from said signal means during operation and for enabling said driver to turn "on" in response to a second input from said signal means during operation.
Claim 2
Dependent Claim
226 words
Semiconductor apparatus which comprises: (a) a first transistor drive having a high current carrying terminal connected to an output terminal; (b) a comparator feedback control network including first and second feedback terminals and fourth and sixth transistors each having a pair of high current carrying terminals and a low current carrying terminal, the first feedback terminal connected to a low current carrying control terminal of said first transistor driver and the second feedback terminal connected to said high current carrying terminal, said second feedback terminal for connection thereto of a controlled device, one of the high current carrying terminals of the fourth transistor being connected to one of the high current carrying terminals of the sixth transistor, the low current carrying terminal of the sixth transistor being connected to the second feedback terminal, and the other of the high current carrying terminals of the fourth transistor being connected to the first feedback terminal, the low current carrying terminal of the fourth transistor being connectd to a terminal for the application thereto of a reference potential; and (c) input signal means, operative on the first feedback terminal, for maintaining said driver in its "off" state in response to a first input from said signal means during operation and for enabling said driver to turn "on" in response to a second input from said signal means during operation.
Claim 3
Dependent Claim
29 words
Apparatus according to claim 1 in which said input signal means includes a second transistor one of whose high current carrying terminals is connected to the first feedback terminal.
Claim 4
Dependent Claim
66 words
Apparatus according to claiam 1 in which the first feedback terminal is connected through a unidirectional current inhibiting device to the other high current carrying terminals of the sixth transistor, and in which the said one high current carrying terminal of the fourth transistor is connected through the high current path of a third transistor to a terminal for the application thereto of a voltage source.
Claim 5
Dependent Claim
66 words
Apparatus according to claiam 1 in which the first feedback terminal is connected through a unidirectional current inhibiting device to the other high current carrying terminals of the sixth transistor, and in which the said one high current carrying terminal of the fourth transistor is connected through the high current path of a third transistor to a terminal for the application thereto of a voltage source.
Claim 6
Dependent Claim
24 words
Apparatus according to claim 3 in which the transconductance of the third transistor is less than those of both the fourth and sixth transistors.
Claim 7
Dependent Claim
65 words
Apparatus according to claim 4 in which the unidirectional current inhibiting device is a fifth transistor one of whose high current carrying terminals is connected to its low current carrying terminals and in which the transconductance of the fifth transistor is less than that of the third transistor, the transconductance of the second transistor being greater than those of both the fourth and sixth transistors.
Claim 8
Dependent Claim
20 words
Apparatus according to claim 5 in which the first, second, fourth and fifth transistors are insulated gate field effect transistors.
Claim 9
Dependent Claim
259 words
Semiconductor apparatus comprising: (a) a first transistor having a low current carrying terminal and a pair of high current carrying terminals, one of said high current carrying terminals being connected to an output terminal to which is connected a light emitting diode in series with a ballast resistor; (b) a second transistor having a low current carrying terminal for connection thereto of an input signal source and having a pair of high current carrying terminals, one of the said high current carrying terminals of the second transistor being connected to the said low current carrying terminal of the first transistor; (c) third, fourth, and sixth transistors each having a low current carrying terminal and a pair of high current carrying terminals; (d) means for connecting mutually together one of the high current carrying terminals of each of the third, fourth, and sixth transistors; (e) a fifth unidirectional current inhibiting transistor device connected between the other high current carrying terminals of the fourth and sixth transistors; and (f) means for connecting the said other high current carrying terminal of the fourth transistor to said one of the high current carrying terminals of the second transistor; said first, second, third, fourth, fifth, and sixth transistors being MOS transistors characterized in that the transconductance of the fifth transistor is less than that of the third transistor, the trnasconductance of the third transistor is less than those of both the fourth and the sixth transistors, and the transconductances of both the fourth and sixth transistors are less than that of the second transistor.
Claim 10
Dependent Claim
259 words
Semiconductor apparatus comprising: (a) a first transistor having a low current carrying terminal and a pair of high current carrying terminals, one of said high current carrying terminals being connected to an output terminal to which is connected a light emitting diode in series with a ballast resistor; (b) a second transistor having a low current carrying terminal for connection thereto of an input signal source and having a pair of high current carrying terminals, one of the said high current carrying terminals of the second transistor being connected to the said low current carrying terminal of the first transistor; (c) third, fourth, and sixth transistors each having a low current carrying terminal and a pair of high current carrying terminals; (d) means for connecting mutually together one of the high current carrying terminals of each of the third, fourth, and sixth transistors; (e) a fifth unidirectional current inhibiting transistor device connected between the other high current carrying terminals of the fourth and sixth transistors; and (f) means for connecting the said other high current carrying terminal of the fourth transistor to said one of the high current carrying terminals of the second transistor; said first, second, third, fourth, fifth, and sixth transistors being MOS transistors characterized in that the transconductance of the fifth transistor is less than that of the third transistor, the trnasconductance of the third transistor is less than those of both the fourth and the sixth transistors, and the transconductances of both the fourth and sixth transistors are less than that of the second transistor.
Claim 11
Dependent Claim
217 words
Semiconductor apparatus comprising: (a) a first transistor having a low current carrying terminal and a pair of high current carrying terminals, one of said high current carrying terminals being connected to an output terminal for connection thereto of a light emitting diode in series with a ballast resistor; (b) a second transistor having a low current carrying terminal for connection thereto of an input signal source and having a pair of high current carrying terminals, one of the said high current carrying terminals of the second transistor being connected to the said low current carrying terminal of the first transistor; (c) third, fourth, and sixth transistors each having a low current carrying terminal and a pair of high current carrying terminals; (d) means for connecting mutually together one of the high current carrying terminals of each of the third, fourth, and sixth transistors; (e) a fifth unidirectional current inhibiting device connected between the other high current carrying terminals of the fourth and sixth transistors; (f) means for connecting the said other high current carrying terminal of the fourth transistor to said one of the high current carrying terminals of the second transistor; and (g) means for connecting the low current carrying terminals of the third and fourth transistors to terminals for the application thereto of reference potentials.
Claim 12
Dependent Claim
217 words
Semiconductor apparatus comprising: (a) a first transistor having a low current carrying terminal and a pair of high current carrying terminals, one of said high current carrying terminals being connected to an output terminal for connection thereto of a light emitting diode in series with a ballast resistor; (b) a second transistor having a low current carrying terminal for connection thereto of an input signal source and having a pair of high current carrying terminals, one of the said high current carrying terminals of the second transistor being connected to the said low current carrying terminal of the first transistor; (c) third, fourth, and sixth transistors each having a low current carrying terminal and a pair of high current carrying terminals; (d) means for connecting mutually together one of the high current carrying terminals of each of the third, fourth, and sixth transistors; (e) a fifth unidirectional current inhibiting device connected between the other high current carrying terminals of the fourth and sixth transistors; (f) means for connecting the said other high current carrying terminal of the fourth transistor to said one of the high current carrying terminals of the second transistor; and (g) means for connecting the low current carrying terminals of the third and fourth transistors to terminals for the application thereto of reference potentials.
Claim 13
Dependent Claim
55 words
Apparatus according to claim 8 in which the other high current carrying terminals of the second and third transistors are connected to terminals for connection thereto of a first voltage source, and the other high current carrying terminal of the sixth transistor is connected to terminals for connection thereto of a second, different voltage source.
Claim 14
Dependent Claim
43 words
Apparatus according to claim 9 in which the first, second, third, fourth and sixth transistors are insulated gate field effect transistors and in which the fifth current inhibiting device is a field effect transistor whose gate terminal is shorted to its drain terminal.
Claim 15
Dependent Claim
30 words
Apparatus according to claim 9 in which said light emitting diode is connected in series with said ballast resistor to a terminal for connection thereto of a third voltage source.
Claim 16
Dependent Claim
25 words
Apparatus according to claim 11 in which the terminals for connection thereto of said second and third voltage sources are one and the same terminals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-07-09 | 1983-01-08 | 1983-07-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-07-09 | 1987-01-08 | 1987-07-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-07-09 | 1991-01-08 | 1991-07-10 | $7700.00 | Window Closed / Lapsed |