US4159524A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit arrangement for the summation of products formed by analog signals and digital coefficients
Assignee: Siemens AG
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Filing: 1977-12-07
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Granted: 1979-06-26
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Expires: 1997-12-07
Abstract
Abstract A circuit arrangement is disclosed for the summation of products formed from analog signals and digital coefficients. A multiplying digital-analog converter is provided having a reference input for receiving analog signals at successive points in time. A data input of the digital-analog converter receives digital coefficients assigned to the respective analog signals. A summation stage connected to output signals of the digital-analog converter integrates over a predetermined time period the output signals of the digital-analog converter representative of products of the analog signals and digital coefficients.
Inventors
- 👤 Gero Schollmeier
- 👤 Heinrich Sailer
- 👤 Helmut Koeth
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 20:36
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/14
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
98 words
A circuit arrangement for a summation of products formed from analog signals and digital coefficients, comprising: a multiplying digital-analog converter means for producing said products; a reference input of the multiplying digital-analog converter means receiving the analog signals at successive points in time; data inputs of the multiplying digital-analog converter means receiving digital coefficients assigned to respective analog signals; a summation means connected to output signals of the multiplying digital-analog converter means corresponding to the products of the analog signals and the digital coefficients; and said summation means integrating said output signals over a respectively predetermined time period.
Claim 2
Dependent Claim
98 words
A circuit arrangement for a summation of products formed from analog signals and digital coefficients, comprising: a multiplying digital-analog converter means for producing said products; a reference input of the multiplying digital-analog converter means receiving the analog signals at successive points in time; data inputs of the multiplying digital-analog converter means receiving digital coefficients assigned to respective analog signals; a summation means connected to output signals of the multiplying digital-analog converter means corresponding to the products of the analog signals and the digital coefficients; and said summation means integrating said output signals over a respectively predetermined time period.
Claim 3
Dependent Claim
55 words
A circuit arrangement in accordance with claim 1, characterized in that a switching means is provided for sending the analog signals and sending corresponding coefficients to the multiplying digital-analog converter means at said successive points in time, said switching means also setting the summation means to an initial value after the respectively predetermined time period.
Claim 4
Dependent Claim
57 words
A circuit arrangement in accordance with claim 2, characterized in that a multiplexer means is connected in series to said reference input of the multiplying digital-analog converter means, said multiplexer means having signal inputs to which are connected the analog signals and having selection inputs which are connected to the switching means via an address register means.
Claim 5
Dependent Claim
63 words
A circuit arrangement in accordance with claim 2, characterized in that a coefficient storage means is provided containing the digital coefficients and having an address input to which are connected addresses sent by the switching means via an address register, said coefficient storage means sending a respective coefficient to the data inputs of the multiplying digital-analog converter means depending upon the respective address.
Claim 6
Dependent Claim
66 words
A circuit arrangement in accordance with claim 4, characterized in that an adder means is connected in series to the coefficient storage means, said adder means receiving at its inputs a respective coefficient from an output of the coefficient store and a respective correction value from a variable compensator, and said adder means having an output connected to a write input of the coefficient storage means.
Claim 7
Dependent Claim
36 words
A circuit arrangement in accordance with claim 1, characterized in that the analog signals connected to the reference input of the multiplying digital-analog converter means are formed at outputs of delay elements in a digital filter.
Claim 8
Dependent Claim
20 words
A circuit arrangement in accordance with claim 6, characterized in that said digital filter is provided as a digital compensator.
Claim 9
Dependent Claim
110 words
A circuit arrangement for a summation of products from analog signals and digital coefficients, comprising: (a) a source of analog signals; (b) a source of digital coefficients; (c) timing means for supplying respective analog signals and corresponding respective digital coefficients at successive points in time; (d) a multiplying digital-analog converter means having a reference input connected to receive the respective analog signals and having a data input for receiving the respective digital coefficients, an output of the multiplying digital-analog converter means providing output signals corresponding to respective products of the respective analog signals and digital coefficients; and (e) summation means for integrating said output signals over a predetermined time period.
Claim 10
Dependent Claim
110 words
A circuit arrangement for a summation of products from analog signals and digital coefficients, comprising: (a) a source of analog signals; (b) a source of digital coefficients; (c) timing means for supplying respective analog signals and corresponding respective digital coefficients at successive points in time; (d) a multiplying digital-analog converter means having a reference input connected to receive the respective analog signals and having a data input for receiving the respective digital coefficients, an output of the multiplying digital-analog converter means providing output signals corresponding to respective products of the respective analog signals and digital coefficients; and (e) summation means for integrating said output signals over a predetermined time period.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-06-25 | 1982-12-25 | 1983-06-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-06-25 | 1986-12-25 | 1987-06-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-06-25 | 1990-12-25 | 1991-06-26 | $7700.00 | Window Closed / Lapsed |