Abstract A switch debounce circuit buffers the mechanical contacts of a double throw single pole switch into digital logic. It is essentially an active debounce circuit requiring only one wire from the switch to the circuit. The circuit includes a pair of oppositely connected inverting logic amplifiers with a resistor coupled between the output of one amplifier and the input of the second amplifier. The input from the switch is connected to the same leg of the circuit as a resistor and the output is taken from an opposite leg connecting the output of the second amplifier to the input of the first amplifier. The propagation of logic signals is effected by changing the state of the switch but contact bounce does not effect the logic.
Inventors
👤 Milton E. Hilliard, Jr.
👤 Daniel J. Provine
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-11-02 10:50
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/125; H03K5/1252
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
145 words
A debounce circuit for a switch having first, second and third pins, said second pin being connected to said first pin or said third pin, selectively said debounce circuit comprising means connecting said third pin to ground, a first resistor of predetermined magnitude connected from a preselected voltage to said first pin, first and second inverting logic amplifiers, each having an input and output, said first inverting logic amplifier being connected to said second pin by way of the associated input thereof, said output of said first inverting logic amplifier providing the resultant signal and also being connected to said input of said second inverting logic amplifier, and a second resistor of preselected magnitude connected from said input of said first inverting logic amplifier to said output of said second inverting logic amplifier, said first and second resistors in combination forming a preselected voltage divider.
Claim 2
Dependent Claim
145 words
A debounce circuit for a switch having first, second and third pins, said second pin being connected to said first pin or said third pin, selectively said debounce circuit comprising means connecting said third pin to ground, a first resistor of predetermined magnitude connected from a preselected voltage to said first pin, first and second inverting logic amplifiers, each having an input and output, said first inverting logic amplifier being connected to said second pin by way of the associated input thereof, said output of said first inverting logic amplifier providing the resultant signal and also being connected to said input of said second inverting logic amplifier, and a second resistor of preselected magnitude connected from said input of said first inverting logic amplifier to said output of said second inverting logic amplifier, said first and second resistors in combination forming a preselected voltage divider.
Claim 3
Dependent Claim
25 words
A switch debounce circuit as described in claim 1 further including a multiplicity of single inputs connected to said first pin of said second switch.