Apparatus for performing a discrete cosine transform of an input signal

Claim 2

Apparatus for performing a modified circular convolution useful for performing the discrete cosine transform of an input signal having N samples, comprising; two read-only memories, each containing a total number equal to 2N-1 of +1's and -1's arranged in a predetermined manner; two multipliers, each having an input from one of the read-only memories, and another, common, input to be connected to the input signal which is to be transformed discretely and cosinusoidally; two transversal filters, each having N taps, the input to each filter being the output of one of the multipliers; and a single-pole double-throw switch means, comprising a switch arm and two free terminals, the switch arm comprising the output of the transform apparatus, each of the free terminals being connected to the output of one of the transversal filters; and means connected to the switch for causing the switch arm to be connected alternately first to one free terminal and then to the other, until all the required input bits have been transformed cosinusoidally.

Claim 3

The apparatus according to claim 1, further comprising: means connected to the read-only memories, multipliers, filters, and the switch means, for controlling the timing or sequencing of these circuits.

Claim 4

The apparatus according to claim 2, wherein: one of the read-only memories discharges first an N number of +1's and then an N-1 number of alternating ±1's, beginning with a +1; and the other read-only memory discharges first an N number of +1's and then an N-1 number of alternating ±1's, beginning with a-1.

Claim 5

Apparatus for performing a discrete cosine transform of an input signal, having N samples, comprising: a first read-only memory which has stored within it data samples corresponding to e -i πj.spsp.2 /2N , j=0, 1 . . . N-1; a first multiplier whose two inputs comprise an input signal g N-2 . . . g 1 g 0 . . . g N-1 . . . g 1 g 0 and the output of the first read-only memory; second and third read-only memories, each containing a predetermined number of +1's and -1's arranged in a predetermined manner; second and third multipliers, each having two inputs, one input of each being connected to the output of the first multiplier, the other inputs being connected to the outputs of the second and third read-only memories, respectively; first and second transversal filters, each having N taps, the input to each filter being the output of the second and third multipliers, respectively; and a single-pole double-throw switch, comprising a switch arm and two free terminals, each of the free terminals being connected to the output of one of the transversal filters; means connected to the switch for causing the switch arm to be connected alternately first to one free terminal and then to the other until all of the required input signal bits are processed; a fourth read-only memory which has stored within it reference samples corresponding to e -i π(k.spsp.2 +k )/2N, k=0, 1 . . . N-1; a fourth multiplier, one of whose outputs is connected to the switch arm, the other input being connected to the output of the fourth read-only memory; and means connected to the output signal of the fourth multiplier, for taking the real part of the signal, which comprises the discrete cosine transform of the input signal.

Claim 6

Apparatus for performing a discrete cosine transform of an input signal, having N samples, comprising: a first read-only memory which has stored within it data samples corresponding to e -i πj.spsp.2 /2N , j=0, 1 . . . N-1; a first multiplier whose two inputs comprise an input signal g N-2 . . . g 1 g 0 . . . g N-1 . . . g 1 g 0 and the output of the first read-only memory; second and third read-only memories, each containing a predetermined number of +1's and -1's arranged in a predetermined manner; second and third multipliers, each having two inputs, one input of each being connected to the output of the first multiplier, the other inputs being connected to the outputs of the second and third read-only memories, respectively; first and second transversal filters, each having N taps, the input to each filter being the output of the second and third multipliers, respectively; and a single-pole double-throw switch, comprising a switch arm and two free terminals, each of the free terminals being connected to the output of one of the transversal filters; means connected to the switch for causing the switch arm to be connected alternately first to one free terminal and then to the other until all of the required input signal bits are processed; a fourth read-only memory which has stored within it reference samples corresponding to e -i π(k.spsp.2 +k )/2N, k=0, 1 . . . N-1; a fourth multiplier, one of whose outputs is connected to the switch arm, the other input being connected to the output of the fourth read-only memory; and means connected to the output signal of the fourth multiplier, for taking the real part of the signal, which comprises the discrete cosine transform of the input signal.