US4151011A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process of producing semiconductor thermally sensitive switching element by selective implantation of inert ions in thyristor structure
Assignee: Mitsubishi Electric Corp
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Filing: 1978-07-14
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Granted: 1979-04-24
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Expires: 1998-07-14
Abstract
Abstract A planar pnpn thyristor structure is prepared to include an SiO 2 film with a thickness of about 10,000A wholly disposed on its main face to which pn junctions are exposed. That portion of the SiO 2 film underlaid with an exposed edge of a collector junction and its adjacent portion are replaced by another SiO 2 film about 1,000A thick. Then argon ions Ar + with an implantation energy of 200 KeV are implanted into the thyristor structure through both films to permit a low lifetime region including a large number of lattice defects to be formed only in its main face portion overlaid with the thin SiO 2 film resulting in a semiconductor thermally sensitive switching element effecting the switchover at a sufficiently low temperature.
Inventors
- 👤 Yutaka Mihashi
- 👤 Josuke Nakata
- 👤 Toshio Sogo
- 👤 Kenichi Yamanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:05
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D18/00; H10D18/251; H10D48/00; H10D48/387; H10P30/208
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
180 words
A process of producing a semiconductor thermally sensitive switching element having at least one pnpn thyristor structure in a semiconductor substrate, including a pn junction exposed to one main face of said semiconductor substrate and reversely biased in an OFF state of the element, and shifted from its OFF to its ON state in response to a rise in temperature which process comprises the steps of disposing a first implantation control film on at least a portion of said main face of said semiconductor substrate having said pn junction exposed thereto while disposing a second implantation control film on the remaining portion of said main face, said first implantation control film having a low penetration stopping capability to implanted ions, said second implantation control film having high penetration stopping capability to said implanted ions, and implanting ions of an element with a predetermined implantation energy into said semiconductor substrate through said first and second implantation control films to form a semiconductor region including lattice defects only in a portion of said semiconductor substrate overlaid with said first implantation control film.
Claim 2
Dependent Claim
180 words
A process of producing a semiconductor thermally sensitive switching element having at least one pnpn thyristor structure in a semiconductor substrate, including a pn junction exposed to one main face of said semiconductor substrate and reversely biased in an OFF state of the element, and shifted from its OFF to its ON state in response to a rise in temperature which process comprises the steps of disposing a first implantation control film on at least a portion of said main face of said semiconductor substrate having said pn junction exposed thereto while disposing a second implantation control film on the remaining portion of said main face, said first implantation control film having a low penetration stopping capability to implanted ions, said second implantation control film having high penetration stopping capability to said implanted ions, and implanting ions of an element with a predetermined implantation energy into said semiconductor substrate through said first and second implantation control films to form a semiconductor region including lattice defects only in a portion of said semiconductor substrate overlaid with said first implantation control film.
Claim 3
Dependent Claim
29 words
A process of producing a semiconductor thermally sensitive switching element as claimed in claim 1 wherein said pn junction is a collector junction disposed in said pnpn thyristor structure.
Claim 4
Dependent Claim
73 words
A process of producing a semiconductor thermally sensitive switching element as claimed in claim 1 wherein said first implantation control film has a thickness smaller than that of said second implantation control film, and said ions are implanted into said semiconductor substrate with such energy that said ions have the projected range larger than the thickness of said first implantation control film and smaller than the thickness of said second implantation control film.
Claim 5
Dependent Claim
28 words
A process of producing a semiconductor thermally sensitive switching element as claimed in claim 1 wherein said ions are caused from an element inert in said semiconductor substrate.
Claim 6
Dependent Claim
40 words
A process of producing a semiconductor thermally sensitive switching element as claimed in claim 4 wherein said element is at least one element selected from the group consisting of argon (Ar), neon (Ne), xenon (Xe), nitrogen (N) and silicon (Si).
Claim 7
Dependent Claim
27 words
A process of producing a semiconductor thermally sensitive switching element as claimed in claim 3 wherein said first and second implantation control films are of silicon dioxide.
Claim 8
Dependent Claim
42 words
A process of producing a semiconductor thermally sensitive switching element as claimed in claim 6 wherein said first implantation control film has a thickness of about 1,000 A and said second implantation control film has a thickness of at least 10,000 A.
Claim 9
Dependent Claim
33 words
A process of producing a semiconductor thermally sensitive switching element as claimed in claim 7, wherein argon ions Ar + are implanted into said semiconductor substrate with an implantation energy of 200 KeV.
Claim 10
Dependent Claim
85 words
A process of producing simultaneously a plurality of semiconductor thermally sensitive switching elements effecting the switchover at different temperatures, comprising the steps of preparing a plurality of semiconductor substrates including pnpn thyristor structure as recited in claim 1 formed by the same manufacturing steps, and repeating the steps of disposing said implantation control films on, and implanting said ions into each of said semiconductor substrates as recited in claim 1 with the number of implanted ions different from one to another of said semiconductor substrates.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-04-23 | 1982-10-23 | 1983-04-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-04-23 | 1986-10-23 | 1987-04-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-04-23 | 1990-10-23 | 1991-04-24 | $7700.00 | Window Closed / Lapsed |