US4146849A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage controlled oscillator
Assignee: Toshiba Corp
•
Filing: 1977-11-11
•
Granted: 1979-03-27
•
Expires: 1997-11-11
Abstract
Abstract A voltage controlled oscillator includes three stages of CMOS inverters arranged in cascade connection. The output of the final stage inverter is connected to the input of the first stage inverter. A capacitor is connected between the input and output of any one of the inverters. The inverter with the capacitor connected thereto comprises two MOS FETs of opposite channel types and is connected in series between high and low voltage sources by control MOS FETs of the same channel types as the respective MOS FETs of the inverter. The gates of the control MOS FETs are connected to control terminals to govern the frequency of the oscillator and one additional fine tune MOS FET is connected across each of control MOS FETs to provide fine tuning of the oscillator.
Inventors
- 👤 Kouichirou Satou
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:05
CPC Classifications
H; H03; H03K; H03K7/00; H03K7/06
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
354 words
A voltage controlled oscillator comprising: a first voltage source terminal connected to a voltage source supplying a high voltage; a second voltage source terminal connected to a voltage supplying a low voltage; an odd number of CMOS inverters of three or more being connected in cascade fashion, theoutput terminal of the final stage inverter being connected to the input terminal of the first stage inverter, each inverter comprising a first MOS FET of first channel type connected to said first voltage source terminal and a second MOS FET of second channel type connected to said second voltage source terminal; a capacitive element inserted between the input and output terminals of any one of said inverters; a third MOS FET of the first channel type connected in series between the first voltage source terminal and the first MOS FET of the inverter to which said capacitive element is connected; a fourth MOS FET of the second channel type connected in series between the second voltage source terminal and the second MOS FET of the inverter to which said capacitive element is connected; a first control terminal connected to the gate of the third MOS FET to receive a first control voltage signal; a second control terminal connected to the gate of the fourth MOS FET to receive a second control voltage signal which is phase-inverted with respect to the first control voltage signal, said first and second control voltage signals controlling the frequency of operation of said oscillator; and means for fine tuning said frequency of operation of said oscillator comprising: (a) a fifth MOS FET of said first channel type of which the source and drain electrodes are connected to the source and drain electrodes of said third MOS FET, respectively; (b) a sixth MoS FET of said second channel type of which the source and drain electrodes are connected to the source and drain electrodes of said fourth MOS FET, respectively; and (c) gate voltage control means for controlling gate voltage applied to the gates of the fifth and sixth MOS FETs to thereby fine tune said frequency of operation of said oscillator.
Claim 2
Dependent Claim
354 words
A voltage controlled oscillator comprising: a first voltage source terminal connected to a voltage source supplying a high voltage; a second voltage source terminal connected to a voltage supplying a low voltage; an odd number of CMOS inverters of three or more being connected in cascade fashion, theoutput terminal of the final stage inverter being connected to the input terminal of the first stage inverter, each inverter comprising a first MOS FET of first channel type connected to said first voltage source terminal and a second MOS FET of second channel type connected to said second voltage source terminal; a capacitive element inserted between the input and output terminals of any one of said inverters; a third MOS FET of the first channel type connected in series between the first voltage source terminal and the first MOS FET of the inverter to which said capacitive element is connected; a fourth MOS FET of the second channel type connected in series between the second voltage source terminal and the second MOS FET of the inverter to which said capacitive element is connected; a first control terminal connected to the gate of the third MOS FET to receive a first control voltage signal; a second control terminal connected to the gate of the fourth MOS FET to receive a second control voltage signal which is phase-inverted with respect to the first control voltage signal, said first and second control voltage signals controlling the frequency of operation of said oscillator; and means for fine tuning said frequency of operation of said oscillator comprising: (a) a fifth MOS FET of said first channel type of which the source and drain electrodes are connected to the source and drain electrodes of said third MOS FET, respectively; (b) a sixth MoS FET of said second channel type of which the source and drain electrodes are connected to the source and drain electrodes of said fourth MOS FET, respectively; and (c) gate voltage control means for controlling gate voltage applied to the gates of the fifth and sixth MOS FETs to thereby fine tune said frequency of operation of said oscillator.
Claim 3
Dependent Claim
32 words
A voltage controlled oscillator according to claim 1, wherein said first, third and fifth MOS FETs are of P-channel type, and said second, fourth and sixth MOS FETs are of N-channel type.
Claim 4
Dependent Claim
32 words
A voltage controlled oscillator according to claim 1, wherein said first, third and fifth MOS FETs are of N-channel type, and said second, fourth and sixth MOS FETs are of P-channel type.
Claim 5
Dependent Claim
35 words
A voltage controlled oscillator according to claim 1, wherein said second control voltage signal is produced by an inverter circuit having a gain of one for inverting the phase of said first control voltage signal.
Claim 6
Dependent Claim
59 words
A voltage controlled oscillator according to claim 4, wherein said inverter circuit comprises an input resistor, an amplifier for inverting the phase of the first control voltage signal, and a feedback resistor for feeding an output signal thereof back to the input side of said amplifier, said input resistor having substantially the same resistance as of said feedback resistor.
Claim 7
Dependent Claim
74 words
A voltage controlled oscillator according to claim 1, wherein said gate volage control means comprises a first resistor provided between said first voltage source terminal and the gate electrode of said fifth MOS FET, a second resistor provided between said second voltage source terminal and the gate electrode of said sixth MOS FET, and a variable resistor provided between the gate of said fifth MOS FET and the gate of said sixth MOS FET.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-03-26 | 1982-09-25 | 1983-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-03-26 | 1986-09-25 | 1987-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-03-26 | 1990-09-25 | 1991-03-27 | $7700.00 | Window Closed / Lapsed |