Hand-held logic circuit probe

Claim 2

A test probe for determining the electrical state of a selected point in a digital circuit, comprising: a voltage divider connectable across the supply voltage of said digital circuit, a central tap of said divider being connectable to said selected point, said divider also having first and second taps between said central tap and the respective ends of said divider, first and second like circuit means for detecting the occurrence of an input thereto in excess of a certain signal level, said first circuit means being connected directly to said first tap to receive an input therefrom, said first tap being selected so that said certain signal level will be exceeded only when said divider central tap is connected to a circuit point having a voltage above a first threshold, an inverter connected to said second tap, said second circuit means being connected to said inverter so as to receive an input from said second tap via said inverter, said second tap being selected so that said certain signal level will be exceeded only when said divider central tap is connected to a circuit point having a voltage below a second threshold, and first and second indicator means cooperating with said first and second circuit means for indicating respectively when the input to the associated circuit means exceeds said certain signal level.

Claim 3

A test probe according to claim 1 wherein each of said like circuit means comprises a pulse stretching circuit for producing a true output for a minimum time duration in response to an input in excess of said certain signal level, said pulse stretching circuit continuing said true output for the entire duration that said input exceeds said certain signal level in the event that said entire duration exceeds said minimum time duration.

Claim 4

A test probe for determining the electrical state of a selected point in a digital circuit, comprising: a voltage divider connectable across the voltage supply of said digital circuit, a central tap of said divider being connectable to said selected point, said divider also having first and second taps between said central tap and the respective ends of said divider, first detector circuit means for producing a true output in response to an input thereto in excess of a first signal level, said first detector circuit means being connected to receive an input from said first tap, said first tap being selected so that said certain signal level will be exceeded only when said divider central tap is connected to a circuit point having a voltage above a first threshold, second detector circuit means for producing a true output in response to an input thereto which is below a second signal level, said second detector circuit means being connected to receive an input from said second tap, said second tap being selected so that said input will be below said second signal level only when said divider central tap is connected to a circuit point having a voltage below a second threshold, and first and second indicator means cooperating with said first and second detector circuit means for indicating respectively when the associated detector circuit means produces a true output.

Claim 5

A test probe for determining the electrical state of a selected point in a digital circuit, comprising: a voltage divider connectable across the voltage supply of said digital circuit, a central tap of said divider being connectable to said selected point, said divider also having first and second taps between said central tap and the respective ends of said divider, first detector circuit means for producing a true output in response to an input thereto in excess of a first signal level, said first detector circuit means being connected to receive an input from said first tap, said first tap being selected so that said certain signal level will be exceeded only when said divider central tap is connected to a circuit point having a voltage above a first threshold, second detector circuit means for producing a true output in response to an input thereto which is below a second signal level, said second detector circuit means being connected to receive an input from said second tap, said second tap being selected so that said input will be below said second signal level only when said divider central tap is connected to a circuit point having a voltage below a second threshold, and first and second indicator means cooperating with said first and second detector circuit means for indicating respectively when the associated detector circuit means produces a true output.

Claim 6

A test probe according to claim 3 wherein said second detector circuit means comprises: a detector circuit identical to said first detector circuit means, and an inverter connected in the input path to said identical detector circuit.

Claim 7

A test probe according to claim 4 wherein said first detector circuit means and said identical detector circuit each comprises: a first NOR gate having a first input terminal connected to receive the input to said circuit, an inverter connected to the output of said first NOR gate, a voltage delay means, a second NOR gate having its output connected to the second input terminal of said first NOR gate, the first of the two inputs of the second NOR gate being connected to the output of said first NOR gate, and the second of the two inputs of the second NOR gate being connected to the output of said inverter via said voltage delay means.

Claim 8

The test probe of claim 2, wherein each pulse stretching circuit comprises; a first NOR gate having a first input terminal connected to receive the input to said circuit, an inverter connected to the output of said first NOR gate, a voltage delay means, a second NOR gate having its output connected to the second input terminal of said first NOR gate, the first of its two inputs being connected to the output of said first NOR gate, and the second of its two inputs being connected to the output of said inverter via said voltage delay means.

Claim 9

The test probe of claim 6, wherein said voltage delay means comprises a resistor-capacitor charging circuit.

Claim 10

The test probe of claim 6, wherein each of said inverters and said NOR gates comprises complimentary symmetry metal oxide silicon integrated circuits.

Claim 11

The test probe of claim 1 together with a pair of connectors electrically connected to said divider ends and connectable to the supply voltage terminals of said digital circuit, and wherein said voltage divider comprises serially connected resistors.

Claim 12

The test probe claim 6, further comprising first and second Schottkey diodes respectively connected between said voltage divider first and second taps and said first and second pulse stretching circuits.

Claim 13

The test probe of claim 1 together with a probe tip connected to said voltage divider central tap.

Claim 14

The test probe of claim 1, wherein said first and second indicator means comprise light emitting diodes.