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US3628141A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-contained probe for delineating characteristics of logic circuit signals

Assignee: ADVANCED DIGITAL RESEARCH CORP
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Filing: 1969-11-17
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Granted: 1971-12-14
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Expires: 1989-11-17
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Abstract

Abstract A self-contained probe for delineating the characteristics of logic circuit signals includes a ''''0'''' and ''''1'''' logic level circuit portion for indicating the absolute logic level of the monitored signal and a change of state portion which includes a JK flip-flop for alternately illuminating two light source indicators to indicate, for example, pulse repetition rate.

Inventors

  • 👤 Russell B Union
  • 👤 Donald J Nagy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 14:59
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/165; G01R19/16533; G01R19/16557

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 138 words
A self-contained probe for delineating the characteristics of a logic circuit signal being monitored comprising: first and second indicating means contained in said probe for indicating the logic level of said signal; means contained in said probe for driving said indicating means including means for actuating one of said indicating means when said signal is greater than a predetermined level and for actuating said other indicating means when said signal is less than said level; third and fourth indicating means contained in said probe for indicating a change in the logic level of said signal; and means contained in said probe for driving said third and fourth indicating means including bistable means for alternately actuating such indicating means only in response to a change in said logic level from a first logic level to a second Logic level.
Claim 2
Dependent Claim 138 words
A self-contained probe for delineating the characteristics of a logic circuit signal being monitored comprising: first and second indicating means contained in said probe for indicating the logic level of said signal; means contained in said probe for driving said indicating means including means for actuating one of said indicating means when said signal is greater than a predetermined level and for actuating said other indicating means when said signal is less than said level; third and fourth indicating means contained in said probe for indicating a change in the logic level of said signal; and means contained in said probe for driving said third and fourth indicating means including bistable means for alternately actuating such indicating means only in response to a change in said logic level from a first logic level to a second Logic level.
Claim 3
Dependent Claim 16 words
A self-contained probe as in claim 1 where said alternate actuation bistable means includes a flip-flop.
Claim 4
Dependent Claim 22 words
A self-contained probe as in claim 2 where said flip-flop is of the JK-type having a response of at least 5 nanoseconds.
Claim 5
Dependent Claim 51 words
A self-contained probe as in claim 1 where the response to a change of logic level of said means for driving said third and fourth indicating means is at least an order of magnitude faster than the response of said first and second indicating means to said change in logic level.
Claim 6
Dependent Claim 20 words
A self-contained probe as in claim 1 where said means for driving said first and second indicating means is monostable.
Claim 7
Dependent Claim 37 words
A self-contained probe as in claim 1 where said first and second indicating means represent ''''0'''' and ''''1'''' logic levels and said third and fourth indicating means represent ''''Q '''' and ''''Q '''' change of logic level.
Claim 8
Dependent Claim 27 words
A self-contained probe in claim 1 together with a conductive probe tip extending from the end of said probe adapted for contacting a circuit to be tested.
Claim 9
Dependent Claim 21 words
A self-contained probe as in claim 7 together with a fuse contained in said probe directly coupled to said probe tip.
Claim 10
Dependent Claim 48 words
A self-contained probe as in claim 1 where said indicating means are light sources and said actuating means for said first and second light sources includes an inverter series connected therebetween and said actuating means for said third and fourth light sources includes an inverter series connected therebetween.
Claim 11
Dependent Claim 31 words
A self-contained probe as in claim 9 where said actuating means for said third and fourth indicators includes a flip-flop having an output coupled to said inverter connected between such indicators.
Claim 12
Dependent Claim 13 words
A self-contained probe as in claim 1 where said indicators are light-emitting diodes.
Claim 13
Dependent Claim 23 words
A self-contained probe as in claim 1 where said probe includes a barrel portion having four windows for respectively exposing said indicating means.
Claim 14
Dependent Claim 149 words
A self-contained probe for delineating the characteristics of a logic circuit signal being monitored comprising: first indicating means having two conditions contained in said probe for indicating the logic level of said signal; means contained in said probe for driving said indicating means for placing said indicating means in one of said conditions when said signal is greater than a predetermined level and for placing said indicating means in the other of said conditions when said signal is less than said level; second indicating means having two conditions contained in said probe for indicating a change in the logic level of said signal; and means contained in said probe for driving said change of level indicating means including bistable means for switching such indicating means between said two conditions only in response to a change in said logic level from a first logic level to a second logic level.
Claim 15
Dependent Claim 149 words
A self-contained probe for delineating the characteristics of a logic circuit signal being monitored comprising: first indicating means having two conditions contained in said probe for indicating the logic level of said signal; means contained in said probe for driving said indicating means for placing said indicating means in one of said conditions when said signal is greater than a predetermined level and for placing said indicating means in the other of said conditions when said signal is less than said level; second indicating means having two conditions contained in said probe for indicating a change in the logic level of said signal; and means contained in said probe for driving said change of level indicating means including bistable means for switching such indicating means between said two conditions only in response to a change in said logic level from a first logic level to a second logic level.

References Cited (Backward Citations)

US2094645A Cited
US2632785A Cited
US3525939A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-12-13 1975-06-14 1975-12-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-12-13 1979-06-14 1979-12-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-12-13 1983-06-14 1983-12-14 $7700.00 Window Closed / Lapsed

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