Patent US4143330A successfully refreshed from Google Patents.
US4143330A
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Detector circuit
Assignee: Toshiba Corp
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Filing: 1977-12-05
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Granted: 1979-03-06
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Expires: 1997-12-05
Abstract
Abstract A detector circuit comprising a detector element which includes a diode having a high-frequency input terminal which receives a predetermined DC bias voltage, and a parallel circuit constituted by a resistor and a capacitor and connected between the output terminal of the detector element and a ground terminal. The detector circuit is further provided with a resistor connected between the parallel circuit and the output terminal of the detector element.
Inventors
- 👤 Shigeru Nagasawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:13
CPC Classifications
H; H03; H03D; H03D1/00; H03D1/08; H03D1/10; H03D1/02; H03D1/06
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
73 words
A detector circuit comprising a reference potential point, a detector circuit output terminal, a detector element having a high-frequency input terminal and a detector element output terminal, resistor means coupled between said detector element output terminal and said detector circuit output terminal, a constant current source coupled between said detector circuit output terminal and said reference potential point, and capacitor means coupled between said detector circuit output terminal and said reference potential point.
Claim 2
Dependent Claim
73 words
A detector circuit comprising a reference potential point, a detector circuit output terminal, a detector element having a high-frequency input terminal and a detector element output terminal, resistor means coupled between said detector element output terminal and said detector circuit output terminal, a constant current source coupled between said detector circuit output terminal and said reference potential point, and capacitor means coupled between said detector circuit output terminal and said reference potential point.
Claim 3
Dependent Claim
52 words
A detector circuit according to claim 1, wherein said detector element is constituted by a transistor of which the base is connected to receive a high-frequency input signal and a predetermined DC bias voltage, the emitter is connected to said resistor means and the collector is connected to receive a constant voltage.
Claim 4
Dependent Claim
16 words
A detector circuit according to claim 1, wherein said detector element is constituted by a diode.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-03-05 | 1982-09-04 | 1983-03-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-03-05 | 1986-09-04 | 1987-03-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-03-05 | 1990-09-04 | 1991-03-06 | $7700.00 | Window Closed / Lapsed |