US4143284A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Arrangement for supplying I2 L circuits with differing currents
Assignee: Siemens AG
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Filing: 1977-05-26
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Granted: 1979-03-06
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Expires: 1997-05-26
Abstract
Abstract An arrangement is provided for supplying integrated injection logic (I 2 L) circuits with differing currents. A first injector path is formed by a connection between an external supply voltage source and injectors of first I 2 L circuits to be supplied with a first current. The first injector path is connected to the injecting emitter of a current hogging injection logic (CHIL) arrangement and a first input of the CHIL arrangement is connected to a second injector path formed by the connection to injectors of second I 2 L circuits to be supplied with a second current.
Inventors
- 👤 Ruediger Mueller
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 15:58
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/091; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22; H10; H10D; H10D84/00; H10D84/60; H10D84/65
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
160 words
An arrangement for supplying integrated injection logic (I 2 L) circuits with differing currents, comprising: a first plurality of I 2 L circuits to be supplied with a first current, each I 2 L circuit having a lateral transistor with an injector; a first injector path connecting injectors of the first plurality of I 2 L circuits; a second plurality of I 2 L circuits to be supplied with a second current different from said first current, each I 2 L circuit of said second plurality having a lateral transistor with an injector; a second injector path connecting injectors of the second plurality of I 2 L circuits; an external voltage source connected to the first injector path; and a current hogging, injection logic (CHIL) arrangement having a lateral transistor with an injecting emitter, a control collector, and an output collector, said first injector path connecting to the injecting emitter and said second injector path connecting to the control collector.
Claim 2
Dependent Claim
160 words
An arrangement for supplying integrated injection logic (I 2 L) circuits with differing currents, comprising: a first plurality of I 2 L circuits to be supplied with a first current, each I 2 L circuit having a lateral transistor with an injector; a first injector path connecting injectors of the first plurality of I 2 L circuits; a second plurality of I 2 L circuits to be supplied with a second current different from said first current, each I 2 L circuit of said second plurality having a lateral transistor with an injector; a second injector path connecting injectors of the second plurality of I 2 L circuits; an external voltage source connected to the first injector path; and a current hogging, injection logic (CHIL) arrangement having a lateral transistor with an injecting emitter, a control collector, and an output collector, said first injector path connecting to the injecting emitter and said second injector path connecting to the control collector.
Claim 3
Dependent Claim
32 words
An arrangement as claimed in claim 1, characterized in that the second injector path is connected with additional CHIL arrangements and additional injector paths formed of additional interconnected I 2 L circuits.
Claim 4
Dependent Claim
41 words
An arrangement as claimed in claim 1, characterized in that the CHIL arrangement lateral transistor comprises a pnp transistor and the output collector of the lateral transistor connects to a base of a vertical npn transistor included within the CHIL arrangement.
Claim 5
Dependent Claim
46 words
An arrangement as claimed in claim 1, characterized in that the lateral transistors of the I 2 L circuits comprise a pnp transistor and a collector of the lateral transistor connects to a base of a vertical npn transistor included in the I 2 L circuits.
Claim 6
Dependent Claim
44 words
An arrangement as claimed in claim 1, characterized in that the first and second plurality of I 2 L circuits and the CHIL arrangement are arranged in a n + doped silicon layer and a n conducting epitaxial layer arranged on the silicon layer.
Claim 7
Dependent Claim
43 words
An arrangement as claimed in claim 1 in which the first and second plurality of I 2 L circuits and the CHIL arrangement are arranged in a P + doped silicon layer and a P conducting epitaxial layer arranged on the silicon layer.
Claim 8
Dependent Claim
153 words
An arrangement for supplying integrated injection logic (I 2 L) circuits with differing currents, comprising: a first I 2 L circuit to be supplied with a first current, said circuit having a common base lateral transistor stage with an injector connecting to a multiple collector vertical transistor stage; a second I 2 L circuit to be supplied with a second current, said circuit having a common base lateral transistor stage with an injector connecting to a multiple collector stage; a voltage source connected to said first I 2 L circuit injector; and a current hogging injection logic (CHIL) circuit having a common base lateral transistor stage and multiple collector vertical transistor stage, said common base lateral transistor stage having an injecting emitter connected to the first I 2 L circuit injector, a control collector connected to the second I 2 L circuit injector, and an output collector connecting to the vertical transistor stage.
Claim 9
Dependent Claim
153 words
An arrangement for supplying integrated injection logic (I 2 L) circuits with differing currents, comprising: a first I 2 L circuit to be supplied with a first current, said circuit having a common base lateral transistor stage with an injector connecting to a multiple collector vertical transistor stage; a second I 2 L circuit to be supplied with a second current, said circuit having a common base lateral transistor stage with an injector connecting to a multiple collector stage; a voltage source connected to said first I 2 L circuit injector; and a current hogging injection logic (CHIL) circuit having a common base lateral transistor stage and multiple collector vertical transistor stage, said common base lateral transistor stage having an injecting emitter connected to the first I 2 L circuit injector, a control collector connected to the second I 2 L circuit injector, and an output collector connecting to the vertical transistor stage.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-03-05 | 1982-09-04 | 1983-03-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-03-05 | 1986-09-04 | 1987-03-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-03-05 | 1990-09-04 | 1991-03-06 | $7700.00 | Window Closed / Lapsed |