Patent US4142162A successfully refreshed from Google Patents.
US4142162A
Expired / Lapsed
US
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Low-distortion double sideband suppressed carrier monolithic modulator
Assignee: 148074 HOLDINGS CANADA Ltd
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Filing: 1978-01-03
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Granted: 1979-02-27
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Expires: 1998-01-03
Abstract
Abstract A double sideband suppressed carrier (DSBSC) modulator for operation from unbalanced carrier frequency and modulation frequency sources has the input terminals of first and second constant current amplifiers connected to receive the modulation frequency output signal from the unbalanced source. The first and second constant current amplifiers provide in-phase and out-of-phase modulation frequency signals at respective high impedance output terminals for connection to a modulator. The modulator comprises a quad, i.e., four transistors connected to provide a pair of differential amplifiers. Transistors 1 and 2 comprising the first of the pair and transistors 3 and 4 comprising the second of the differential pair. The emitters of each differential amplifier are tied together. The emitter junction of the first differential amplifier is connected to the high impedance output of the first constant current amplifier, and the emitter junction of the second differential amplifier is connected to the high impedance output of the second constant current amplifier. The base of transistors 2 and 3 are connected together and then connected to one terminal of the carrier frequency source. The bases of transistors 1 and 4 are connected together and then connected to the other terminal of the carrier frequency source. The collectors of transistors 1 and 3 are tied together and the collectors of transistors 2 and 4 are tied together to provide the modulated signal output paths.
Inventors
- 👤 Christopher R. Huntley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 19:20
CPC Classifications
H; H03; H03C; H03C1/00; H03C1/52; H03C1/54; H03C1/542; H03C1/545; H03C2200/00; H03C2200/0004; H03C2200/0012; H03C2200/0037; H03C2200/0066
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
461 words
A low-distortion double sideband suppressed carrier modulator, arranged to operate from the unbalanced output terminals of a carrier frequency source and from the unbalanced output terminals of a modulation frequency source, comprising: a quad amplifier comprising: a first differential amplifier including first and second transistors having their emitters connected together and to a first input terminal, having the base of said first transistor arranged for connection to a first output terminal of said carrier frequency source, having the base of said second transistor arranged for connection to a second output terminal of said carrier frequency source, having the collector of said first transistor connected to a first output terminal and the collector of said second transistor connected to a second output terminal; and a second differential amplifier including third and fourth transistors having their emitters connected together and to a second input terminal, having the base of said third transistor connected to the base of said second transistor, having the base of said fourth transistor connected to the base of said first transistor, having the collector of said third transistor connected to said first output terminal and the collector of said fourth transistor connected to said second output terminal, whereby the modulated output signals from said first and second differential amplifiers are combined so as to increase the amplitude of the modulated signal at the modulator output terminals; a first high impedance circuit comprising: a fifth transistor having a base electrode connected to a third input terminal, and having an emitter electrode connected to a fourth input terminal, said third and fourth input terminals arranged for connection to a modulation frequency source; and a sixth transistor having a base electrode connected to the collector electrode of said fifth transistor, having a collector electrode connected to the first input terminal, having a first feedback resistor connected between the emitter electrode of said sixth transistor and the base electrode of said fifth transistor, and a second feedback resistor connected between the emitter electrode of said sixth transistor and said fourth input terminal; and a second high impedance circuit comprising: a seventh transistor having the emitter electrode connected to the fourth input terminal, and having impedance means connected between the emitter electrode of said sixth transistor and the base electrode of said seventh transistor for providing an inverted modulation frequency input to said seventh transistor; and an eighth transistor having the base electrode connected to the collector electrode of the seventh transistor, having the emitter electrode connected through a third feedback resistor connected to said fourth input terminal, having a fourth feedback resistor connected between the emitter electrode of the eighth transistor and the base of the seventh transistor and having the collector electrode connected to the second input terminal of the quad amplifier.
Claim 2
Dependent Claim
461 words
A low-distortion double sideband suppressed carrier modulator, arranged to operate from the unbalanced output terminals of a carrier frequency source and from the unbalanced output terminals of a modulation frequency source, comprising: a quad amplifier comprising: a first differential amplifier including first and second transistors having their emitters connected together and to a first input terminal, having the base of said first transistor arranged for connection to a first output terminal of said carrier frequency source, having the base of said second transistor arranged for connection to a second output terminal of said carrier frequency source, having the collector of said first transistor connected to a first output terminal and the collector of said second transistor connected to a second output terminal; and a second differential amplifier including third and fourth transistors having their emitters connected together and to a second input terminal, having the base of said third transistor connected to the base of said second transistor, having the base of said fourth transistor connected to the base of said first transistor, having the collector of said third transistor connected to said first output terminal and the collector of said fourth transistor connected to said second output terminal, whereby the modulated output signals from said first and second differential amplifiers are combined so as to increase the amplitude of the modulated signal at the modulator output terminals; a first high impedance circuit comprising: a fifth transistor having a base electrode connected to a third input terminal, and having an emitter electrode connected to a fourth input terminal, said third and fourth input terminals arranged for connection to a modulation frequency source; and a sixth transistor having a base electrode connected to the collector electrode of said fifth transistor, having a collector electrode connected to the first input terminal, having a first feedback resistor connected between the emitter electrode of said sixth transistor and the base electrode of said fifth transistor, and a second feedback resistor connected between the emitter electrode of said sixth transistor and said fourth input terminal; and a second high impedance circuit comprising: a seventh transistor having the emitter electrode connected to the fourth input terminal, and having impedance means connected between the emitter electrode of said sixth transistor and the base electrode of said seventh transistor for providing an inverted modulation frequency input to said seventh transistor; and an eighth transistor having the base electrode connected to the collector electrode of the seventh transistor, having the emitter electrode connected through a third feedback resistor connected to said fourth input terminal, having a fourth feedback resistor connected between the emitter electrode of the eighth transistor and the base of the seventh transistor and having the collector electrode connected to the second input terminal of the quad amplifier.
Claim 3
Dependent Claim
18 words
Apparatus in accordance with claim 1 wherein said second feedback resistor and said third feedback resistor are matched.
Claim 4
Dependent Claim
46 words
Apparatus in accordance with claim 2 wherein said impedance means and said third and fourth feedback resistors are selected to provide substantially the same modulation signal output on the collector electrode of said eighth transistor as is obtained from the collector electrode of said sixth transistor.
References Cited (Backward Citations)
US3550040A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-02-26 | 1982-08-28 | 1983-02-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-02-26 | 1986-08-28 | 1987-02-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-02-26 | 1990-08-28 | 1991-02-27 | $7700.00 | Window Closed / Lapsed |