Signal processing circuit

Claim 2

A signal processing circuit comprising: a first crosstalk circuit including a delay circuit of a delay time τ and imparting a specific transfer characteristic to a first input signal; a second crosstalk circuit including a delay circuit of the delay time τ and imparting a specific transfer characteristic to a second input signal; first addition means for adding the output signal of the first crosstalk circuit and the second input signal; second addition means for adding the output of the second crosstalk circuit and the first input signal; and means for deriving output binaural signals respectively from the first and second addition means, said first and second crosstalk circuits further having, respectively, means for attenuating components of specific frequencies defined by (2n-1)/2τ (where n is a positive integer) of the signals passing through the crosstalk circuits.

Claim 3

A signal processing circuit as claimed in claim 1 in which the attenuating means comprises comb filters possessing comb filtering characteristics having dips at said specific frequencies.

Claim 4

A signal processing circuit as claimed in claim 1 in which the attenuating means comprises means for adding the output signals of the delay circuits and the input signals of the delay circuits passed through resistors.

Claim 5

A signal processing circuit as claimed in claim 1 in which the first and second crosstalk circuits further have frequency characteristic imparting circuits having respectively frequency characteristics substantially corresponding to the differences between the frequency characteristics at the two ears of a listener with respect to a sound source.

Claim 6

A signal processing circuit for biphonic use comprising: first and second subtraction means respectively supplied with first and second input signals and substantially carrying out subtraction; a first crosstalk circuit including a delay circuit of a delay time τ and operating to impart a specific transfer characteristic to the output signal of the first subtraction means, an output of the first crosstalk circuit being supplied to the second subtraction means; a second crosstalk circuit including a delay circuit of the delay time τ and operating to impart a specific transfer characteristic to the output signal of the second subtraction means, an output of the second crosstalk circuit being supplied to the first subtraction means; and a circuit for deriving output signals from the first and second subtraction means, said first and second crosstalk circuits further having, respectively, means for attenuating components of specific frequencies defined by (2n-1)/2τ (where n is a positive integer) of signals passing through the crosstalk circuits.

Claim 7

A signal processing circuit for biphonic use comprising: first and second subtraction means respectively supplied with first and second input signals and substantially carrying out subtraction; a first crosstalk circuit including a delay circuit of a delay time τ and operating to impart a specific transfer characteristic to the output signal of the first subtraction means, an output of the first crosstalk circuit being supplied to the second subtraction means; a second crosstalk circuit including a delay circuit of the delay time τ and operating to impart a specific transfer characteristic to the output signal of the second subtraction means, an output of the second crosstalk circuit being supplied to the first subtraction means; and a circuit for deriving output signals from the first and second subtraction means, said first and second crosstalk circuits further having, respectively, means for attenuating components of specific frequencies defined by (2n-1)/2τ (where n is a positive integer) of signals passing through the crosstalk circuits.

Claim 8

A signal processing circuit as claimed in claim 5 in which the attenuation means comprises comb filters possessing comb filtering characteristics having dips at said specific frequencies.

Claim 9

A signal processing circuit as claimed in claim 5 in which the attenuating means comprises means for adding the output signals of the delay circuits and the input signals of the delay circuits passed through resistors.

Claim 10

A signal processing circuit as claimed in claim 5 in which the first and second crosstalk circuits further have frequency characteristic imparting circuits having respectively frequency characteristics substantially corresponding to the differences between the frequency characteristics at the two ears of a listener with respect to a sound source.

Claim 11

A signal processing circuit for biphonic use comprising: a first crosstalk circuit including a delay circuit of a delay time τ 1 and imparting a specific transfer characteristic to a first input signal; a second crosstalk circuit including a delay circuit of the delay time τ 1 and imparting a specific transfer characteristic to a second input signal, said first and second crosstalk circuits further having, respectively, means for attenuating components of specific frequencies defined by (2n-1)/2τ 1 (where n is a positive integer) of the signals passing through the crosstalk circuits; first addition means for adding the output signal of the first crosstalk circuit and the second input signal; second addition means for adding the output of the second crosstalk circuit and the first input signal; first and second subtraction means respectively supplied with output signals from the first and second addition means and substantially carrying out subtraction; a third crosstalk circuit including a delay circuit of a delay time τ 2 and operating to impart a specific transfer characteristic to the output signal of the first subtraction means, an output of the third crosstalk circuit being supplied to the second subtraction means; a fourth crosstalk circuit including a delay circuit of the delay time τ 2 and operating to impart a specific transfer characteristic to the output signal of the second subtraction means, an output of the crosstalk circuit being supplied to the first subtraction means, said third and fourth crosstalk circuits further having, respectively, means for attenuating components of specific frequencies defined by (2n-1)/2τ 2 of signals passing through the crosstalk circuits; and a circuit for deriving output signals from the first and second subtraction means.

Claim 12

A signal processing circuit for biphonic use comprising: a first crosstalk circuit including a delay circuit of a delay time τ 1 and imparting a specific transfer characteristic to a first input signal; a second crosstalk circuit including a delay circuit of the delay time τ 1 and imparting a specific transfer characteristic to a second input signal, said first and second crosstalk circuits further having, respectively, means for attenuating components of specific frequencies defined by (2n-1)/2τ 1 (where n is a positive integer) of the signals passing through the crosstalk circuits; first addition means for adding the output signal of the first crosstalk circuit and the second input signal; second addition means for adding the output of the second crosstalk circuit and the first input signal; first and second subtraction means respectively supplied with output signals from the first and second addition means and substantially carrying out subtraction; a third crosstalk circuit including a delay circuit of a delay time τ 2 and operating to impart a specific transfer characteristic to the output signal of the first subtraction means, an output of the third crosstalk circuit being supplied to the second subtraction means; a fourth crosstalk circuit including a delay circuit of the delay time τ 2 and operating to impart a specific transfer characteristic to the output signal of the second subtraction means, an output of the crosstalk circuit being supplied to the first subtraction means, said third and fourth crosstalk circuits further having, respectively, means for attenuating components of specific frequencies defined by (2n-1)/2τ 2 of signals passing through the crosstalk circuits; and a circuit for deriving output signals from the first and second subtraction means.