US4137141A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for producing a silicon nitride diffusion barrier on a semiconductor substrate, particularly III-V semiconductor substrates
Assignee: Individual
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Filing: 1977-11-14
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Granted: 1979-01-30
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Expires: 1997-11-14
Abstract
Abstract The process according to this invention makes it possible to produce a silicon nitride diffusion barrier on a semiconductor substrate, such as III-V semiconductor substrate and particularly a GaAs substrate, the produced diffusion barrier being efficient at temperatures as high as 900° C during a long period. It comprises the following steps: (a) chemical deoxidation of the substrate, (b) thermal treatment at 400° C, (c) 1st cathode sputtering step in a nitrogen atmosphere with a cathode made of silicon, (d) ionic etching to reduce the thickness of nitride layer produced in c), (e) 2nd cathode sputtering step similar to the first one. It is useful for III-V semiconductors having to be treated at high temperature, as for instance to be annealed after ion implantation.
Inventors
- 👤 Loic G. Henry
- 👤 Pierre N. Favennec
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 11:45
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/694; H10P14/6943; H10P14/69433; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6329
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
108 words
A process for forming a silicon nitride diffusion barrier by cathode sputtering onto a dioxidized semiconductor substrate which has been preheated to approximately 400° C, which comprises the following steps, cathode sputtering in a nitrogen atmosphere with a silicon target to grow a first silicon nitride layer on the substrate, ionically etching the exposed surface of the silicon nitride layer in an atmosphere of nitrogen and argon until the first silicon nitride layer has been reduced by about one half, and cathode sputtering in a nitrogen atmosphere with a silicon target, a second silicon nitride layer upon the reduced silicon nitride layer to form the desired diffusion barrier.
Claim 2
Dependent Claim
108 words
A process for forming a silicon nitride diffusion barrier by cathode sputtering onto a dioxidized semiconductor substrate which has been preheated to approximately 400° C, which comprises the following steps, cathode sputtering in a nitrogen atmosphere with a silicon target to grow a first silicon nitride layer on the substrate, ionically etching the exposed surface of the silicon nitride layer in an atmosphere of nitrogen and argon until the first silicon nitride layer has been reduced by about one half, and cathode sputtering in a nitrogen atmosphere with a silicon target, a second silicon nitride layer upon the reduced silicon nitride layer to form the desired diffusion barrier.
Claim 3
Dependent Claim
47 words
A process according to claim 1, wherein between the end of the first cathode sputtering step and the beginning of the ionic etching step, and between the end of the ionic etching step and the beginning of the second sputtering step, the substrate is allowed to cool.
Claim 4
Dependent Claim
62 words
A process according to claim 2, in which the first and second cathode sputtering steps are performed with a cathode anode distance of approximately 5 cm, at a nitrogen pressure of 5-6 × 10 -3 torr, a power of about approximately 800 watts, and a flow of nitrogen sufficient for producing a silicon nitride layer 800-900 angstroms thick, at each sputtering step.
Claim 5
Dependent Claim
62 words
A process according to claim 1, in which the first and second cathode sputtering steps are performed with a cathode anode distance of approximately 5 cm, at a nitrogen pressure of 5-6 × 10 -3 torr, a power of about approximately 800 watts, and a flow of nitrogen sufficient for producing a silicon nitride layer 800-900 angstoms thick, at each sputtering step.
Claim 6
Dependent Claim
55 words
A process according to claim 1, in which the ionic etching step is performed with a cathode-anode distance of approximately 3.5 cm, power of approximately 300 watts, and under partial pressure of a mixture of nitrogen and argon of about 5 × 10 -3 torr for nitrogen and 2 × 10 -3 torr for argon.
Claim 7
Dependent Claim
13 words
Method according to claim 1, in which the semiconductor is a III-V semiconductor.
Claim 8
Dependent Claim
12 words
Method according to claim 6, in which the III-V semiconductor is GaAs.
References Cited (Backward Citations)
GB900334A
Cited
US3600218A
Cited
US3591477A
Cited
DE2006276A1
Cited
US3849276A
Cited
FR2148245A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-01-29 | 1982-07-31 | 1983-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-01-29 | 1986-07-31 | 1987-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-01-29 | 1990-07-31 | 1991-01-30 | $7700.00 | Window Closed / Lapsed |