Patent US4135295A successfully refreshed from Google Patents.
US4135295A
Expired / Lapsed
US
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Process of making platinum silicide fuse links for integrated circuit devices
Assignee: Advanced Micro Devices Inc
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Filing: 1977-06-20
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Granted: 1979-01-23
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Expires: 1997-06-20
Abstract
Abstract Selected circuit elements and interconnections of an integrated circuit device are connected by platinum silicide fuse links which open when electrical power exceeds a threshold amount. The fuse is constructed by defining the fuse geometry in a polycrystalline silicon layer over a wafer substrate, depositing a layer of platinum thereover and then sintering the platinum into the polysilicon.
Inventors
- 👤 William L. Price
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:46
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/80; H10W20/00; H10W20/40; H10W20/49; H10W20/493; Y; Y10; Y10S; Y10S148/00; Y10S148/02; Y10S148/055; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49107
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
70 words
In a process for making fusing links in integrated circuit construction including the steps of providing a suitable substrate, forming circuit regions, the improvement comprising, depositing a polycrystalline silicon layer over said substrate, defining fuse geometry in said polycrystalline silicon layer by masking and etching, depositing a platinum layer onto said fuse geometry, thermally reacting said platinum with said polycrystalline silicon, thereby forming platinum silicide fuses, and removing excess platinum.
Claim 2
Dependent Claim
70 words
In a process for making fusing links in integrated circuit construction including the steps of providing a suitable substrate, forming circuit regions, the improvement comprising, depositing a polycrystalline silicon layer over said substrate, defining fuse geometry in said polycrystalline silicon layer by masking and etching, depositing a platinum layer onto said fuse geometry, thermally reacting said platinum with said polycrystalline silicon, thereby forming platinum silicide fuses, and removing excess platinum.
Claim 3
Dependent Claim
31 words
The process of claim 1 further defined by depositing said platinum layer onto said fuse geometry to a thickness at least 50% thinner than the thickness of the polycrystalline fuse layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-01-22 | 1982-07-24 | 1983-01-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-01-22 | 1986-07-24 | 1987-01-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-01-22 | 1990-07-24 | 1991-01-23 | $7700.00 | Window Closed / Lapsed |