Patent JPS6448436A successfully refreshed from Google Patents.
US4134078A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Gain control circuit
Assignee: Hitachi Ltd
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Filing: 1977-08-09
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Granted: 1979-01-09
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Expires: 1997-08-09
Abstract
Abstract A gain control circuit comprising a pair of transistors constituting a differential amplifier, and a pair of resistors each connected to the emitter of one of the transistors and having a sufficiently great resistance value compared with 1/gm of the transistor in the transistor operating range, the resistors being connected to a common regulated current supply to supply the halves of control current from the regulated current supply to the respective transistors, a pair of diodes are connected to the collectors of the respective transistors as a load, and a first variable resistor means is disposed in the current path traced from the diodes to the regulated current supply via the transistors and resistors for compensating fluctuation of the diffused resistance of the diodes. Further, a second variable resistor means is disposed in the base bias circuit for the transistors for compensating fluctuation of the base-emitter voltage of the transistors.
Inventors
- 👤 Takao Arai
- 👤 Shigeru Okada
- 👤 Kouichi Tomatsuri
- 👤 Hiroshi Toeda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:53
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/0052
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
170 words
A gain control circuit comprising: a pair of transistors constituting a differential amplifier; a pair of resistors each connected at one end thereof to an emitter of one of said transistors said resistors having a large resistance value compared with 1/gm of the transistor in a transistor operating range; a regulated current supply connected at one terminal thereof to the other ends of said resistor pair for supplying a regulated control current to said transistor pair through said resistor pair; a pair of semiconductor elements each connected at one electrode thereof to a collector of one of said transistors and controlled in resistance with the regulated control current from said regulated current supply; a first variable resistor means connected between said semiconductor elements and a power supply for compensating for unbalanced components of DC resistance of said semiconductor elements; and a bias circuit connected to the bases of said transistors, said bias circuit including a second variable resistor means for compensating for unbalanced components of base-to-emitter voltages of said transistors.
Claim 2
Dependent Claim
170 words
A gain control circuit comprising: a pair of transistors constituting a differential amplifier; a pair of resistors each connected at one end thereof to an emitter of one of said transistors said resistors having a large resistance value compared with 1/gm of the transistor in a transistor operating range; a regulated current supply connected at one terminal thereof to the other ends of said resistor pair for supplying a regulated control current to said transistor pair through said resistor pair; a pair of semiconductor elements each connected at one electrode thereof to a collector of one of said transistors and controlled in resistance with the regulated control current from said regulated current supply; a first variable resistor means connected between said semiconductor elements and a power supply for compensating for unbalanced components of DC resistance of said semiconductor elements; and a bias circuit connected to the bases of said transistors, said bias circuit including a second variable resistor means for compensating for unbalanced components of base-to-emitter voltages of said transistors.
Claim 3
Dependent Claim
25 words
A gain control circuit as claimed in claim 1, wherein a pair of resistors are additionally connected in parallel with said first variable resistor means.
Claim 4
Dependent Claim
161 words
A gain control circuit comprising: a pair of transistors constituting a differential amplifier; a pair of emitter-circuit resistors each connected at one end thereof to the emitter of one of said transistors and having a large resistance value compared with 1/gm of the transistor in the transistor operating range; a first variable resistor means connected to the other ends of said emitter-circuit resistors for correcting the emitter-circuit resistors of said transistors; a regulated current supply connected to said transistors through said first variable resistor means and said emitter-circuit resistor for driving and controlling said transistors with a regulated current therefrom; a pair of semiconductor elements connected between the respective collectors of said transistors and a power supply and controlled in resistance with the regulated current from said regulated power supply; and a bias circuit connected to the bases of said transistors, said bias circuit including a second variable resistor means for compensating for unbalanced components of base-to-emitter voltages of said transistors.
Claim 5
Dependent Claim
161 words
A gain control circuit comprising: a pair of transistors constituting a differential amplifier; a pair of emitter-circuit resistors each connected at one end thereof to the emitter of one of said transistors and having a large resistance value compared with 1/gm of the transistor in the transistor operating range; a first variable resistor means connected to the other ends of said emitter-circuit resistors for correcting the emitter-circuit resistors of said transistors; a regulated current supply connected to said transistors through said first variable resistor means and said emitter-circuit resistor for driving and controlling said transistors with a regulated current therefrom; a pair of semiconductor elements connected between the respective collectors of said transistors and a power supply and controlled in resistance with the regulated current from said regulated power supply; and a bias circuit connected to the bases of said transistors, said bias circuit including a second variable resistor means for compensating for unbalanced components of base-to-emitter voltages of said transistors.
Claim 6
Dependent Claim
153 words
A gain control circuit comprising: a pair of transistors constituting a differential amplifier; a pair of emitter-circuit resistors each connected at one end thereof to the emitter of one of said transistors and having a large resistance value compared with 1/gm of the transistors in a transistor operating range; a regulated current supply connected to said transistor pair for driving and controlling said transistor pair with a regulated current; a pair of semiconductor elements connected between the respective collectors of said transistor pair and a power supply and controlled in resistance with said regulated current; a first variable resistor means disposed in a pair of current paths from said power supply to said regulated current supply for compensating for DC resistances of said pair of current paths; and a second variable resistor means disposed in a bias circuit connected to said transistor pair for correcting unbalanced components of base-to-emitter voltages of said transistors.
Claim 7
Dependent Claim
153 words
A gain control circuit comprising: a pair of transistors constituting a differential amplifier; a pair of emitter-circuit resistors each connected at one end thereof to the emitter of one of said transistors and having a large resistance value compared with 1/gm of the transistors in a transistor operating range; a regulated current supply connected to said transistor pair for driving and controlling said transistor pair with a regulated current; a pair of semiconductor elements connected between the respective collectors of said transistor pair and a power supply and controlled in resistance with said regulated current; a first variable resistor means disposed in a pair of current paths from said power supply to said regulated current supply for compensating for DC resistances of said pair of current paths; and a second variable resistor means disposed in a bias circuit connected to said transistor pair for correcting unbalanced components of base-to-emitter voltages of said transistors.
References Cited (Backward Citations)
US3641450A
Cited
US3970948A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-01-08 | 1982-07-10 | 1983-01-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-01-08 | 1986-07-10 | 1987-01-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-01-08 | 1990-07-10 | 1991-01-09 | $7700.00 | Window Closed / Lapsed |