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US4132908A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital-to-analog conversion with deglitch

Assignee: Smiths Industries Inc
•
Filing: 1977-08-04
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Granted: 1979-01-02
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Expires: 1997-08-04
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Abstract

Abstract A deglitch circuit is provided to connect a source of changing voltage or current to a utilization device to eliminate unwanted voltage excursion contemporaneous with changes in amplitude. The deglitching circuit includes one transformer winding with a center tap connected to the source and a pair of serially connected diodes connected to terminals of the winding. Another winding of the transformer is connected to a source of potential through switches which allow the other winding to alternately conduct current in one or another sense. Changes in the sense of current conduction through the other winding induce a voltage into the one transformer winding. Depending on the change in current this voltage may forward bias the diodes and provide the effect of a closed switch between the source and the circuit output, which is taken at the junction of the diodes. With change of current in the other sense, a voltage is induced into the one winding to reverse bias the diodes and thus providing, in effect, an open switch between the voltage source and circuit output.

Inventors

  • 👤 Bill B. Hughes

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 18:45
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/125; H03K5/1252; H03M; H03M1/00; H03M1/06; H03M1/08; H03M1/0863; H03M1/0872

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 147 words
A deglitching circuit for connection between a utilization device and a source of voltage periodically changing in amplitude to eliminate unwanted voltage excursions generated when said source changes in amplitude, comprising timed switching means serially connected to said source and to a capacitor, wherein the improvement comprises an improved timed switching means including: a transformer winding with a center tap connected to said source, a pair of serially connected diodes connected across said winding with said capacitor connected to a junction of said diodes, another winding of said transformer, said another winding connected to a source of potential through switching devices for alternately conducting current through said another winding in one or another sense whereby a current transition in said another winding in one sense induces a potential in said one winding to reverse bias said diodes providing an open switch between said source and said capacitor.
Claim 2
Dependent Claim 147 words
A deglitching circuit for connection between a utilization device and a source of voltage periodically changing in amplitude to eliminate unwanted voltage excursions generated when said source changes in amplitude, comprising timed switching means serially connected to said source and to a capacitor, wherein the improvement comprises an improved timed switching means including: a transformer winding with a center tap connected to said source, a pair of serially connected diodes connected across said winding with said capacitor connected to a junction of said diodes, another winding of said transformer, said another winding connected to a source of potential through switching devices for alternately conducting current through said another winding in one or another sense whereby a current transition in said another winding in one sense induces a potential in said one winding to reverse bias said diodes providing an open switch between said source and said capacitor.
Claim 3
Dependent Claim 45 words
The apparatus of claim 1 wherein said another winding has a center tap connected to said source of potential, said switching devices comprising a pair of switches each connecting one terminal of said another winding to ground, each of said switches alternately conducting and cut-off.
Claim 4
Dependent Claim 13 words
The apparatus of claim 2 wherein each of said switches comprises an FET.
Claim 5
Dependent Claim 108 words
A sample and hold circuit connected between an input source and an output capacitor comprising switching means with means responsive to a sample signal for closing said switch in which the improvement comprises an improved switching means comprising: a transformer having a center-tapped secondary winding connected to said input source and a pair of diodes connected across said winding, said output capacitor connected to a junction of said diodes, and a primary winding of said transformer connected to a potential source with switches connected to said primary winding and responsive to said sample signal to allow current flow alternately in one and another direction in said primary winding.
Claim 6
Dependent Claim 108 words
A sample and hold circuit connected between an input source and an output capacitor comprising switching means with means responsive to a sample signal for closing said switch in which the improvement comprises an improved switching means comprising: a transformer having a center-tapped secondary winding connected to said input source and a pair of diodes connected across said winding, said output capacitor connected to a junction of said diodes, and a primary winding of said transformer connected to a potential source with switches connected to said primary winding and responsive to said sample signal to allow current flow alternately in one and another direction in said primary winding.
Claim 7
Dependent Claim 14 words
The apparatus of claim 4 in which said diodes are connected cathode to anode.
Claim 8
Dependent Claim 13 words
The apparatus of claim 4 in which each said switch comprises an FET.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1982-01-01 1982-07-03 1983-01-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1986-01-01 1986-07-03 1987-01-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1990-01-01 1990-07-03 1991-01-02 $7700.00 Window Closed / Lapsed

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