Bucket brigade circuit

Claim 1

An improved bucket brigade shift register device, comprising: a first bucket brigade switching device having an input electrode, an output electrode, and a control electrode, whose control electrode is connected to a first phase clock waveform and having a characteristic control electrode-to-output electrode capacitance at a first node, for propagating a charge signal from said input electrode to said first node when said first phase clock waveform is on; a second bucket brigade switching device having an input electrode connected to said first node, an output electrode, and a control electrode, whose control electrode is connected to a second phase clock waveform which is non-overlapping with said first phase clock waveform, said first and second switching devices forming a bucket brigade shift register, for propagating said charge signal from said first node to said output electrode of said second switching device when said second phase clock waveform is on; a capacitor of substantially equal magnitude to said characteristic control electrode-to-output electrode capacitance of said first bucket brigade switching device, connected between said first node and the inverse of said first phase clock waveform for supplying a compensating charge to said first node in response to said inverse of said first phase clock waveform to compensate for charge withdrawn through said control electrode-to-output electrode capacitance by said first phase clock waveform during its fall time; whereby said charge signal can be propagated through said first and second bucket brigade switching devices without diminishing its amplitude, thereby enhancing the charge transfer efficiency and dynamic range of the bucket brigade shift register.