Method of fabricating silicon photodiodes

Claim 1

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) ramping the diffusion temperature during steps (b) and (c) to reduce crystalline defects; (e) forming an n + -layer in the π-layer; (f) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; (g) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 2

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) ramping the diffusion temperature during steps (b) and (c) to reduce crystalline defects; (e) forming an n + -layer in the π-layer; (f) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; (g) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 3

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (e) forming an n + -layer in the π-layer; (f) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; and (g) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 4

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (e) forming an n + -layer in the π-layer; (f) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; and (g) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 5

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorous diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (e) ramping the diffusion temperature during steps (b), (c) and (d) to reduce crystalline defects; (f) forming an n + -layer in the π-layer (g) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; and (h) forming electrical contacts to the substrate, the guard ring and the channel stop.

Claim 6

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorous diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (e) ramping the diffusion temperature during steps (b), (c) and (d) to reduce crystalline defects; (f) forming an n + -layer in the π-layer (g) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; and (h) forming electrical contacts to the substrate, the guard ring and the channel stop.

Claim 7

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming in the π-layer a p-type channel stop by boron diffusion; (c) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (d) ramping the diffusion temperature during steps (b) and (c) to reduce crystalline defects; (e) forming an n + -layer in the π-layer; (f) forming an antireflection coating on at least the n + -layer; (g) forming electrical contact to the substrate, the n + -layer and the channel stop so that the channel stop contact overlaps the surface portion of the π-p metallurgical junction an the n + -layer contact overlaps the surface portion of the π-n + metallurgical junction.

Claim 8

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming in the π-layer a p-type channel stop by boron diffusion; (c) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (d) ramping the diffusion temperature during steps (b) and (c) to reduce crystalline defects; (e) forming an n + -layer in the π-layer; (f) forming an antireflection coating on at least the n + -layer; (g) forming electrical contact to the substrate, the n + -layer and the channel stop so that the channel stop contact overlaps the surface portion of the π-p metallurgical junction an the n + -layer contact overlaps the surface portion of the π-n + metallurgical junction.

Claim 9

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (e) ramping the diffusion temperature during steps (b), (c) and (d) to reduce crystalline defects; (f) forming an n + -layer in the π-layer; (g) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop by the steps of: (1) forming a thin layer of SiO 2 ; (2) annealing the SiO 2 layer at an elevated temperature in an atmosphere containing HCl; (3) forming an Si 3 N 4 layer about onequarter wavelength thick on the SiO 2 layer; and (h) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 10

A method of fabricating a front-illuminated silicon photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (e) ramping the diffusion temperature during steps (b), (c) and (d) to reduce crystalline defects; (f) forming an n + -layer in the π-layer; (g) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop by the steps of: (1) forming a thin layer of SiO 2 ; (2) annealing the SiO 2 layer at an elevated temperature in an atmosphere containing HCl; (3) forming an Si 3 N 4 layer about onequarter wavelength thick on the SiO 2 layer; and (h) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 11

A method of fabricating a front-illuminated n 30 -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (g) ramping the diffusion temperature during steps (b), (c), (e), and (f) to reduce crystalline defects; (h) forming an n + -layer in the p-layer; (i) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop by the steps of (1) forming a thin layer of SiO 2 ; (2) annealing the SiO 2 layer at an elevated temperature in an atmosphere containing HCl; (3) forming an Si 3 N 4 layer about onequarter wavelength thick on the SiO 2 layer; (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (k) mutually adapting the implanting step (d), the driving step (e) and the forming step (h) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 12

A method of fabricating a front-illuminated n 30 -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (g) ramping the diffusion temperature during steps (b), (c), (e), and (f) to reduce crystalline defects; (h) forming an n + -layer in the p-layer; (i) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop by the steps of (1) forming a thin layer of SiO 2 ; (2) annealing the SiO 2 layer at an elevated temperature in an atmosphere containing HCl; (3) forming an Si 3 N 4 layer about onequarter wavelength thick on the SiO 2 layer; (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (k) mutually adapting the implanting step (d), the driving step (e) and the forming step (h) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 20

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode suitable for detecting radiation in the range of about 0.8 to 0.85 μm with quantum efficiency of at least 95%, response speed of at least 1 ns, dark current of about 10 -11 A, gain of at least 100 with an excess noise factor of less than 6 at reverse bias of at least 100V, comprising the steps of: (a) epitaxially growing a π-type silicon layer of at least 300 Ω-cm resistivity and at least 35 μm thick on a low dislocation density, p-type silicon substrate doped with boron to about 5 × 10 17 -1.2 × 10 18 cm -3 ; (b) forming an n-type guard ring in the π-layer be depositing a phosphorus glass layer at about 900°-950° C. for 15-30 min., removing the glass layer, heating a furnace to about 900° C., inserting the wafer (substrate) into the furnace, gradually increasing the temperature to about 1200° C., maintaining the temperature constant for about 1 hr. in an atmosphere of substantially N 2 + 0.1% O 2 , gradually decreasing the temperature back to about 900° C., and removing the wafer from the furnace, (c) forming in the π-layer a p-type channel top around the guard ring by depositing a boron glass layer at about 950°-975° C. for 1-2 hrs., removing the glass layer, heating a furnace to about 900° C., inserting the wafer into the furnace, gradually increasing the temperature to about 1150° C., maintaining the temperature constant for about 1 hr. in an atmosphere of essentially 100% O 2 , and gradually decreasing the temperature back to about 900° C., and removing the wafer from the furnace, (d) implanting 150 keV boron ions at a dose of about 5.5 × 10 12 cm -2 ±5% into the surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating at about 1200° C. for 4 hrs. in an atmosphere of essentially 100% O 2 , thereby to form a p-layer about 5-7 μm thick and ramping the temperature between about 900° C. and 1200° C. as in the procedure of steps (b) and/or (c); (f) introducing phosphorus into the backside of the substrate by forming thereon a phosphorus glass layer and heating for about 1100° C. for 1 hr. in an atmosphere of substantially N 2 + 0.1% O 2 , thereby to getter defects and/or impurities, and then removing the glass layer, and ramping the temperature between about 900° C. and 1100° C. as in the procedure of steps (b) and/or (c); (g) forming an n + -layer about 0.4 μm thick in the p-layer so that it extends laterally beyond the p-layer and into the guard ring by depositing a phosphorus glass layer and heating at about 925° C. for 30 min. in an atmoshpere of substantially N 2 + 0.1% O 2 ; (h) forming an antireflection coating on at least the n 20 -layer and a passivation coating on the region between the guard ring and channel stop by the steps of: (1) forming a thin layer of SiO 2 by a dry oxidation process; (2) annealing the SiO 2 layer at about 900° C. for 10 min. in an atmosphere containing about 5% HCl, thereby to trap or getter Na ions in the oxide; and (3) forming an Si 3 N 4 layer about onequarter wavelength thick on the SiO 2 layer; (i) removing enough of the backside of the substrate so as to remove the phosphorus doped layer formed in prior steps, implanting boron ions in the backside at an energy of about 30-50 keV to a dose of about 2-4 × 10 15 cm -2 , and heating in a nitrogen atmosphere at about 750°-800° C. for 30-60 min.; (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (k) annealing at about 300°-320° C. for 16-24 hrs. in an atmosphere of substantially N 2 + 8-15% H 2 ; (l) mutually adapting the implanting step (d), the driving step (e), and the forming step (g) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 21

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode suitable for detecting radiation in the range of about 0.8 to 0.85 μm with quantum efficiency of at least 95%, response speed of at least 1 ns, dark current of about 10 -11 A, gain of at least 100 with an excess noise factor of less than 6 at reverse bias of at least 100V, comprising the steps of: (a) epitaxially growing a π-type silicon layer of at least 300 Ω-cm resistivity and at least 35 μm thick on a low dislocation density, p-type silicon substrate doped with boron to about 5 × 10 17 -1.2 × 10 18 cm -3 ; (b) forming an n-type guard ring in the π-layer be depositing a phosphorus glass layer at about 900°-950° C. for 15-30 min., removing the glass layer, heating a furnace to about 900° C., inserting the wafer (substrate) into the furnace, gradually increasing the temperature to about 1200° C., maintaining the temperature constant for about 1 hr. in an atmosphere of substantially N 2 + 0.1% O 2 , gradually decreasing the temperature back to about 900° C., and removing the wafer from the furnace, (c) forming in the π-layer a p-type channel top around the guard ring by depositing a boron glass layer at about 950°-975° C. for 1-2 hrs., removing the glass layer, heating a furnace to about 900° C., inserting the wafer into the furnace, gradually increasing the temperature to about 1150° C., maintaining the temperature constant for about 1 hr. in an atmosphere of essentially 100% O 2 , and gradually decreasing the temperature back to about 900° C., and removing the wafer from the furnace, (d) implanting 150 keV boron ions at a dose of about 5.5 × 10 12 cm -2 ±5% into the surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating at about 1200° C. for 4 hrs. in an atmosphere of essentially 100% O 2 , thereby to form a p-layer about 5-7 μm thick and ramping the temperature between about 900° C. and 1200° C. as in the procedure of steps (b) and/or (c); (f) introducing phosphorus into the backside of the substrate by forming thereon a phosphorus glass layer and heating for about 1100° C. for 1 hr. in an atmosphere of substantially N 2 + 0.1% O 2 , thereby to getter defects and/or impurities, and then removing the glass layer, and ramping the temperature between about 900° C. and 1100° C. as in the procedure of steps (b) and/or (c); (g) forming an n + -layer about 0.4 μm thick in the p-layer so that it extends laterally beyond the p-layer and into the guard ring by depositing a phosphorus glass layer and heating at about 925° C. for 30 min. in an atmoshpere of substantially N 2 + 0.1% O 2 ; (h) forming an antireflection coating on at least the n 20 -layer and a passivation coating on the region between the guard ring and channel stop by the steps of: (1) forming a thin layer of SiO 2 by a dry oxidation process; (2) annealing the SiO 2 layer at about 900° C. for 10 min. in an atmosphere containing about 5% HCl, thereby to trap or getter Na ions in the oxide; and (3) forming an Si 3 N 4 layer about onequarter wavelength thick on the SiO 2 layer; (i) removing enough of the backside of the substrate so as to remove the phosphorus doped layer formed in prior steps, implanting boron ions in the backside at an energy of about 30-50 keV to a dose of about 2-4 × 10 15 cm -2 , and heating in a nitrogen atmosphere at about 750°-800° C. for 30-60 min.; (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (k) annealing at about 300°-320° C. for 16-24 hrs. in an atmosphere of substantially N 2 + 8-15% H 2 ; (l) mutually adapting the implanting step (d), the driving step (e), and the forming step (g) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 22

A method of fabricating a front-illuminated N + -P-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (g) ramping the diffusion temperature during steps (b), (c), (e), and (f) to reduce crystalline defects; (h) forming an n + -layer in the p-layer; (i) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (k) mutually adapting the implanting step (d), the driving step (e) and the forming step (h) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 23

A method of fabricating a front-illuminated N + -P-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (g) ramping the diffusion temperature during steps (b), (c), (e), and (f) to reduce crystalline defects; (h) forming an n + -layer in the p-layer; (i) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (k) mutually adapting the implanting step (d), the driving step (e) and the forming step (h) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 24

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) ramping the diffusion temperature during steps (b), (c), and (e) to reduce crystalline defects; (g) forming an n + -layer in the p-layer; (h) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; (i) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (j) mutually adapting the implanting step (d), the driving step (e) and the forming step (g) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 25

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) ramping the diffusion temperature during steps (b), (c), and (e) to reduce crystalline defects; (g) forming an n + -layer in the p-layer; (h) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; (i) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction; and (j) mutually adapting the implanting step (d), the driving step (e) and the forming step (g) in combination with subsequent steps which involve heating so that the resultant electric field profile in the p-layer is substantially triangular and of the desired magnitude.

Claim 26

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate;

Claim 27

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate;

Claim 34

A method of fabricating a front-illuminated n + -n-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer;

Claim 35

A method of fabricating a front-illuminated n + -n-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer;

Claim 38

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (g) ramping the diffusion temperature during steps (b), (c), (e), and (f) to reduce crystalline defects; (h) forming an n + -layer in the p-layer; (i) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; and (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 39

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming an n-type guard ring in the π-layer by phosphorus diffusion; (c) forming in the π-layer a p-type channel stop around the guard ring by boron diffusion; (d) implanting boron ions in a surface portion of the π-layer within the guard ring; (e) driving in the implanted boron ions by heating to form a p-layer; (f) introducing phosphorus into the backside of the substrate effective to getter defects and/or impurities; (g) ramping the diffusion temperature during steps (b), (c), (e), and (f) to reduce crystalline defects; (h) forming an n + -layer in the p-layer; (i) forming an antireflection coating on at least the n + -layer and a passivation coating on the region between the guard ring and channel stop; and (j) forming electrical contacts to the substrate, the guard ring and the channel stop so that the guard ring contact overlaps the surface portion of the π-n metallurgical junction and the channel stop contact overlaps the surface portion of the π-p metallurgical junction.

Claim 40

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming in the π-layer a p-type channel stop by boron diffusion; the channel stop surrounding the active area of the photodiode; (c) implanting boron ions in a surface portion of the π-layer within the active area; (d) driving in the implanted boron ions by heating to form a p-layer; (e) introducing phosphorus into the backside of th substrate effective to getter defects and/or impurities; (f) ramping the diffusion temperature during steps (b), (d) and (e) to reduce crystalline defects; (g) forming an n + -layer in the p-layer; (h) forming an antireflection coating on at least the n + -layer; (i) forming electrical contacts to the substrate, the n + -layer and the channel stop so that the channel stop contact overlaps the surface portion of the π-p metallurgical junction and the n + -layer contact overlaps the surface portion of the π-n + metallurgical junction; and

Claim 41

A method of fabricating a front-illuminated n + -p-π-p + silicon avalanche photodiode comprising the steps of: (a) epitaxially growing a high resistivity π-type silicon layer on a low dislocation density, high conductivity p-type silicon substrate; (b) forming in the π-layer a p-type channel stop by boron diffusion; the channel stop surrounding the active area of the photodiode; (c) implanting boron ions in a surface portion of the π-layer within the active area; (d) driving in the implanted boron ions by heating to form a p-layer; (e) introducing phosphorus into the backside of th substrate effective to getter defects and/or impurities; (f) ramping the diffusion temperature during steps (b), (d) and (e) to reduce crystalline defects; (g) forming an n + -layer in the p-layer; (h) forming an antireflection coating on at least the n + -layer; (i) forming electrical contacts to the substrate, the n + -layer and the channel stop so that the channel stop contact overlaps the surface portion of the π-p metallurgical junction and the n + -layer contact overlaps the surface portion of the π-n + metallurgical junction; and