Patent US4127878A successfully refreshed from Google Patents.
US4127878A
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US
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Magnetic tape recorder/reproducer for ratio recording with synchronized internal and external clock rates
Assignee: EXATRON Corp A CORP OF
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Filing: 1976-06-28
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Granted: 1978-11-28
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Expires: 1996-06-28
Abstract
Abstract A data processing system which synchronizes an internal clock with an external clock. The system can be incorporated as part of a magnetic reproducer apparatus or magnetic recorder apparatus. The recorder/reproducer apparatus utilizes ratio encoding schemes to convert conventional data into encoded data to be recorded onto a magnetic medium. It can also read the encoded data from a magnetic medium and convert it back into conventional data. In either case, the synchronized internal clock is utilized as the time base for the ratio encoding.
Inventors
- 👤 Clark E. Johnson, Jr.
- 👤 Eugene P. Johnson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 18:09
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1407; G11B20/1411; H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4904
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
131 words
A data processing system comprising: clock means for generating an internal, variable rate clock signal; comparator means receiving an external clock signal and producing an error signal indicative of the difference between the rate of the internal clock signal and the rate of the external clock signal; control means responsive to said error signal for varying the rate of said internal clock signal to synchronize its rate with the rate of said external clock signal, and interface means for converting between a first signal containing a self-clocked, single-channel, ratio-encoded data stream and a second signal containing dual-channels with a timing signal on one channel and a time-correlated data stream on the other channel, said interface means utilizing said synchronized internal clock signal for the conversion between said first and second signals.
Claim 2
Dependent Claim
131 words
A data processing system comprising: clock means for generating an internal, variable rate clock signal; comparator means receiving an external clock signal and producing an error signal indicative of the difference between the rate of the internal clock signal and the rate of the external clock signal; control means responsive to said error signal for varying the rate of said internal clock signal to synchronize its rate with the rate of said external clock signal, and interface means for converting between a first signal containing a self-clocked, single-channel, ratio-encoded data stream and a second signal containing dual-channels with a timing signal on one channel and a time-correlated data stream on the other channel, said interface means utilizing said synchronized internal clock signal for the conversion between said first and second signals.
Claim 3
Dependent Claim
80 words
A data processing system as in claim 1 and wherein said clock means includes a voltage controlled oscillator having an input and an output, said comparator means includes a phase comparator having two inputs and an output, and said control means includes a filter connected between said phase comparator output and said voltage controlled oscillator input, the output from the voltage controlled oscillator being connected as one input to said phase comparator, the other input receiving said external clock signal.
Claim 4
Dependent Claim
45 words
A data processing system as in claim 2 and wherein said voltage controlled oscillator produces an output signal which is a multiple of the desired internal clock rate, and further comprising divider means for dividing the rate of the output of the voltage controlled oscillator.
Claim 5
Dependent Claim
88 words
A data processing system as in claim 2 and wherein said system is a magnetic recorder and further comprising means for receiving from an external source said time-correlated data stream, the time-used in said correlation being said external clock signal, and wherein said interface means includes a waveform synthesizer receiving the synchronized internal clock signals from said clock means and said time correlated data stream from said receiving means and converting them to said first signal, wherein said first signal utilizes said synchronized internal clock signal for self-clocking.
Claim 6
Dependent Claim
93 words
A data processing system as in claim 4 and wherein said waveform synthesizer comprises a dividing circuit means for dividing said synchronized internal clock signal to produce increments of each time interval provided by said clock signal, the number of increments produced being related to the encoding ratio of said first signal, waveform generator means for providing pulses for each of said increments, and waveform selector means receiving said time-correlated data stream and for selecting a desired polarity of pulses for said increments at each time interval in response to said data stream.
Claim 7
Dependent Claim
62 words
A data processing system as in claim 5 and wherein said time-correlated data stream contains binary data, said number of increments is three, and the encoding ratio is characterized by a pulse of one-third of an interval for one of the binary values of said data, and a pulse of two-thirds of an interval for the other binary value of said data.
Claim 8
Dependent Claim
27 words
A data processing system as in claim 4 and further comprising recording means coupled to said waveform synthesizer for recording the first signal onto a recording medium.
Claim 9
Dependent Claim
36 words
A data processing system as in claim 6 and wherein said waveform generator means further comprises first and second pulse generator means each producing a predetermined signal polarity for each of said binary values of data.
Claim 10
Dependent Claim
37 words
A data processing system as in claim 8 and wherein each of said pulse generator means includes an exclusive OR gate, and wherein said waveform selector includes multivibrator means associated with each of said exclusive OR gates.
Claim 11
Dependent Claim
19 words
A data processing system as in claim 3 and wherein said dividing circuit includes a plurality of multivibrator circuits.
Claim 12
Dependent Claim
39 words
A data processing system as in claim 4 and further comprising gating means responsive to both the achieving of the synchronism of said internal clock signal and to other internal command signals, for enabling said waveform synthesizer to operate.
Claim 13
Dependent Claim
106 words
A data processing system as in claim 2, wherein said system is a magnetic reader, and further comprising recovery means for receiving said first signal from a recording medium and transforming said first signal into the external clock signal and into an externally-timed, ratio-encoded data signal, and wherein said interface means includes conversion means receiving both the synchronized internal clock signals from said clock means and said externally-timed, ratio-encoded data signal and converting them to said time-correlated data stream, wherein the time used for correlation is said synchronized internal clock signal, and wherein said synchronized internal clock signal forms the timing signal of said second signal.
Claim 14
Dependent Claim
57 words
A data processing system as in claim 12 and wherein said receiving means comprises peak detectors for respectively detecting the positive and negative pulses of said received first signal, and a latching means receiving the output from said peak detectors to form said externally-timed, ratio-encoded data signal, and wherein said positive pulses form said external clock signal.
Claim 15
Dependent Claim
37 words
A data processing system as in claim 12 and wherein said conversion means comprises inverting means for inverting said synchronized internal clock signal, and a multivibrator receiving said inverted clock signal and said externally-timed, ratio-encoded data signal.
Claim 16
Dependent Claim
35 words
A data processing system as in claim 14 and wherein said multivibrator is a CD flip flop whose data input receives said externally-timed, ratio-encoded data signal, and whose clock input receives said inverted clock signal.
Claim 17
Dependent Claim
127 words
A magnetic recorder for digital data, comprising receiving means for receiving a time-based data stream having an external clock signal as the time base; clock means for generating an internal variable-rate clock signal. comparator means receiving the external clock signal and producing an error signal indicative of the difference between the internal clock rate and the external clock rate; control means responsive to said error signal for varying the rate of said clock means to synchronize its rate with the rate of said external clock signal, and waveform synthesizer means receiving the synchronized internal clock signals from said clock means and said time-based data stream from said receiving means, and converting them to a self-clocked, single-channel, ratio-encoded data stream utilizing said synchronized clock signal for the self-clocking.
Claim 18
Dependent Claim
127 words
A magnetic recorder for digital data, comprising receiving means for receiving a time-based data stream having an external clock signal as the time base; clock means for generating an internal variable-rate clock signal. comparator means receiving the external clock signal and producing an error signal indicative of the difference between the internal clock rate and the external clock rate; control means responsive to said error signal for varying the rate of said clock means to synchronize its rate with the rate of said external clock signal, and waveform synthesizer means receiving the synchronized internal clock signals from said clock means and said time-based data stream from said receiving means, and converting them to a self-clocked, single-channel, ratio-encoded data stream utilizing said synchronized clock signal for the self-clocking.
Claim 19
Dependent Claim
79 words
A magnetic recorder as in claim 16 and wherein said clock means includes a voltage controlled oscillator having an input and an output, said comparator means includes a phase comparator having two inputs and an output, and said control means includes a filter connected between said phase comparator output and said voltage controlled oscillator input, the output from said voltage controlled oscillator being connected as one input to said phase comparator, the other input receiving said external clock signal.
Claim 20
Dependent Claim
44 words
A magnetic recorder as in claim 17 and wherein said voltage controlled oscillator produces an output signal which is a multiple of the desired internal clock rate, and further comprising divider means for dividing the rate of the output of the voltage controlled oscillator.
Claim 21
Dependent Claim
55 words
A magnetic recorder as in claim 16 and further comprising inverting means connected between said clock means and said receiving means for inverting said synchronized internal variable clock signal and applying the inverted signal to said time-based data stream to form a delayed data stream, said delayed data stream being applied to said waveform synthesizer.
Claim 22
Dependent Claim
91 words
A magnetic recorder as in claim 16 and wherein said waveform synthesizer comprises a dividing circuit means for dividing said synchronized internal clock signal to produce increments of each time interval provided by said clock signal, the number of increments being related to the encoding ratio of said first signal, waveform generator means for providing pulses for each of said increments, and waveform selector means receiving said time-correlated data stream and for selecting a desired polarity of pulses for said increments at each time interval in response to said data stream.
Claim 23
Dependent Claim
26 words
A magnetic recorder as in claim 16 and further comprising recording means coupled to said waveform synthesizer for recording the first signal onto a recording medium.
Claim 24
Dependent Claim
145 words
A magnetic reader for ditigal data, comprising: recovery means for receiving a self-clocked, single channel, ratio-encoded data stream utilizing an external clock signal for the self-clocking, and transforming said received data stream into an external clock signal and into an externally-timed, ratio-encoded data signal; clock means for generating an internal variable-rate clock signal; comparator means receivng the external clock signal and producing an error signal indicative of the difference between the internal clock rate and the external clock rate; control means responsive to said error signal for varying the rate of said clock means to synchronize its rate with the rate of said external clock signal, and conversion for receiving both the synchronized internal clock signals from said clock means and said externally-timed ratio-encoded data signal and converting them into a time-correlated data stream, wherein the time used for correlation is said synchronized interclock signal.
Claim 25
Dependent Claim
145 words
A magnetic reader for ditigal data, comprising: recovery means for receiving a self-clocked, single channel, ratio-encoded data stream utilizing an external clock signal for the self-clocking, and transforming said received data stream into an external clock signal and into an externally-timed, ratio-encoded data signal; clock means for generating an internal variable-rate clock signal; comparator means receivng the external clock signal and producing an error signal indicative of the difference between the internal clock rate and the external clock rate; control means responsive to said error signal for varying the rate of said clock means to synchronize its rate with the rate of said external clock signal, and conversion for receiving both the synchronized internal clock signals from said clock means and said externally-timed ratio-encoded data signal and converting them into a time-correlated data stream, wherein the time used for correlation is said synchronized interclock signal.
Claim 26
Dependent Claim
56 words
A magnetic reader as in claim 22 and wherein said receiving means comprises peak detectors for respectively detecting the positive and negative pulses of said received first signal, and a latching means receiving the outputs from said peak detectors to form said externally-timed, ratio-encoded data signal, and wherein said positive pulses form said external clock signal.
Claim 27
Dependent Claim
36 words
A magnetic reader as in claim 22 and wherein said conversion means comprises inverting means for inverting said synchronized internal clock signal, and a multivibrator receiving said inverted clock signal and said externally-timed ratio-encoded data signal.
Claim 28
Dependent Claim
34 words
A magnetic reader as in claim 24 and wherein said multivibrator is a CD flip flop whose data input receives said externally-timed, ratio-encoded data signal, and whose clock input receives said inverted clock signal.
Claim 29
Independent Claim
164 words
A method of processing data, comprising the steps of: receiving an incoming time-based data signal having an external clock rate as its time base; generating an internal variable clock rate signal; comparing said internal clock rate signal with the external clock rate signal to produce an error signal indicative of the difference between said rates; varying the rate of said internal clock rate signal to synchronize it with said external clock rate signal in response to said error signal; and generating an output signal representative of said incoming data which is time-based on said synchronized internal clock rate signal; and wherein: said incoming signal is a dual-channel, parallel, clock rate and data signal; and further comprising the steps of: converting said incoming signal into a single-channel, self-clocked, serial data signal; and pulse width modulating said serial data wherein a bit interval is determined by the period between leading edges of consecutive pulses, and each data bit is defined by the width of each pulse.
Claim 30
Independent Claim
164 words
A method of processing data, comprising the steps of: receiving an incoming time-based data signal having an external clock rate as its time base; generating an internal variable clock rate signal; comparing said internal clock rate signal with the external clock rate signal to produce an error signal indicative of the difference between said rates; varying the rate of said internal clock rate signal to synchronize it with said external clock rate signal in response to said error signal; and generating an output signal representative of said incoming data which is time-based on said synchronized internal clock rate signal; and wherein: said incoming signal is a dual-channel, parallel, clock rate and data signal; and further comprising the steps of: converting said incoming signal into a single-channel, self-clocked, serial data signal; and pulse width modulating said serial data wherein a bit interval is determined by the period between leading edges of consecutive pulses, and each data bit is defined by the width of each pulse.
Claim 31
Dependent Claim
29 words
The method of claim 26 wherein the phases of said clock signals are compared to produce an error signal indicative of the difference in rate between said clock signals.
Claim 32
Dependent Claim
19 words
The method of claim 26 and further comprising the step of recording the modulated signal on a recording medium.
Claim 33
Independent Claim
142 words
A method of processing data, comprising the steps of: receiving an incoming time-based data signal having an external clock rate as its time base; generating an internal, variable clock rate signal; comparing said internal clock rate signal with the external clock rate signal to produce an error signal indicative of the difference between said rates; varying the rate of said internal clock rate signal to synchronize it with said external clock rate signal in response to said error signal; and generating an output signal representative of said incoming data which is time-based on said synchronized internal clock rate signal, and wherein said incoming signal is a single-channel, self-clocked, ratio-encoded data signal recorded on a medium, and further comprising the steps of: reading said incoming signal from the medium; and converting said incoming signal into a dual-channel, parallel, clock rate and data signal.
Claim 34
Independent Claim
142 words
A method of processing data, comprising the steps of: receiving an incoming time-based data signal having an external clock rate as its time base; generating an internal, variable clock rate signal; comparing said internal clock rate signal with the external clock rate signal to produce an error signal indicative of the difference between said rates; varying the rate of said internal clock rate signal to synchronize it with said external clock rate signal in response to said error signal; and generating an output signal representative of said incoming data which is time-based on said synchronized internal clock rate signal, and wherein said incoming signal is a single-channel, self-clocked, ratio-encoded data signal recorded on a medium, and further comprising the steps of: reading said incoming signal from the medium; and converting said incoming signal into a dual-channel, parallel, clock rate and data signal.
References Cited (Backward Citations)
US3080487A
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US3810234A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-11-27 | 1982-05-29 | 1982-11-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-11-27 | 1986-05-29 | 1986-11-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-11-27 | 1990-05-29 | 1990-11-28 | $7700.00 | Window Closed / Lapsed |