Patent US4121271A successfully refreshed from Google Patents.
US4121271A
Expired / Lapsed
US
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Reverse power flow detector and control circuit
Assignee: General Electric Co
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Filing: 1973-12-26
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Granted: 1978-10-17
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Expires: 1993-12-26
Abstract
Abstract A solid state, reverse power flow detector and control circuit which samples the line voltage and current, once each cycle. The voltage sampling circuit includes a pulse generator providing a voltage pulse of short duration at a given time or phase angle in each cycle. The voltage signals are applied to an SCR through a gate operated by the current signals. With forward or no current the voltage signals do not reach the SCR. When current reverses the voltage signals are allowed to trigger the SCR. The SCR turns on a transistor energizing a relay, after a brief delay. The relay acts to set the regulator or other device in power reverse condition. When current again is forward the relay is deenergized and the device returned to the power forward condition.
Inventors
- 👤 Reysen Tsai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:43
CPC Classifications
H; H02; H02H; H02H3/00; H02H3/38; H02H3/382; H02H3/003
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
118 words
A reverse power flow detector and control circuit utilizing solid state components comprising: a. a voltage sampling circuit for generating a voltage signal including a voltage reference pulse generator connected to the line to be monitored, b. a current sampling circuit for generating a current signal, c. an output circuit, said output circuit including a control circuit, said control circuit having a time delay relay to delay connection of said control circuit in a reverse mode until contacts in said forward mode have stopped arcing, d. a gate including a transistor operative to short said pulses from said pulse generator when said current signal indicates forward power flow, operative between said voltage pulse generator and said output circuit,
Claim 2
Dependent Claim
118 words
A reverse power flow detector and control circuit utilizing solid state components comprising: a. a voltage sampling circuit for generating a voltage signal including a voltage reference pulse generator connected to the line to be monitored, b. a current sampling circuit for generating a current signal, c. an output circuit, said output circuit including a control circuit, said control circuit having a time delay relay to delay connection of said control circuit in a reverse mode until contacts in said forward mode have stopped arcing, d. a gate including a transistor operative to short said pulses from said pulse generator when said current signal indicates forward power flow, operative between said voltage pulse generator and said output circuit,
Claim 3
Dependent Claim
50 words
said gate actuated by a current signal indicating forward power flow to prevent pulses generated by said pulse generator from activating said output circuit and 2. said gate actuated by a current signal indicating reverse power flow to allow pulses generated by said pulse generator to activate said output circuit.
Claim 4
Dependent Claim
50 words
said gate actuated by a current signal indicating forward power flow to prevent pulses generated by said pulse generator from activating said output circuit and 2. said gate actuated by a current signal indicating reverse power flow to allow pulses generated by said pulse generator to activate said output circuit.
Claim 5
Dependent Claim
109 words
A reverse power flow detector and control circuit utilizing solid state components comprising: a. a voltage sampling circuit for generating a voltage signal including a voltage reference pulse generator connected to the line to be monitored. b. a current sampling circuit for generating a current signal, c. an output circuit, d. a gate including a transistor operative to short said pulses from said pulse generator when said current signal indicates forward power flow, operative between said voltage pulse generator and said output circuit, 1. said gate actuated by a current signal indicating forward power flow to prevent pulses generated by said pulse generator from activating said output circuit and
Claim 6
Dependent Claim
109 words
A reverse power flow detector and control circuit utilizing solid state components comprising: a. a voltage sampling circuit for generating a voltage signal including a voltage reference pulse generator connected to the line to be monitored. b. a current sampling circuit for generating a current signal, c. an output circuit, d. a gate including a transistor operative to short said pulses from said pulse generator when said current signal indicates forward power flow, operative between said voltage pulse generator and said output circuit, 1. said gate actuated by a current signal indicating forward power flow to prevent pulses generated by said pulse generator from activating said output circuit and
Claim 7
Dependent Claim
90 words
said gate actuated by a current signal indicating reverse power flow to allow pulses generated by said pulse generator to activate said output circuit, e. a selector switch, said selector switch provided with test positions such that in one position of said selector switch an indication is provided of the operation of the detector and control circuit in a forward power flow mode and in another position of said selector switch an indication is provided of the operation of the detector and control circuit in the reverse power flow mode.
Claim 8
Dependent Claim
90 words
said gate actuated by a current signal indicating reverse power flow to allow pulses generated by said pulse generator to activate said output circuit, e. a selector switch, said selector switch provided with test positions such that in one position of said selector switch an indication is provided of the operation of the detector and control circuit in a forward power flow mode and in another position of said selector switch an indication is provided of the operation of the detector and control circuit in the reverse power flow mode.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-10-16 | 1982-04-17 | 1982-10-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-10-16 | 1986-04-17 | 1986-10-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-10-16 | 1990-04-17 | 1990-10-17 | $7700.00 | Window Closed / Lapsed |