Time division digital multiplexer apparatus

Claim 1

An improved multiplexed data transmission system of the type wherein a plurality of input data signals and a clock signal are frequency division multiplexed for transmission over voice grade transmission circuits, wherein the improvement comprises: a delay equalization and frame synchronization apparatus comprising in combination: a sending unit for generating a system clock frequency and a plurality of output signals derived from said system clock frequency, said sending unit generating an end of frame signal which initiates a reset pulse, said reset pulse disables the generation of said plurality of output signals and enables a send modem, said send modem modulates said system clock frequency to provide an output FSK signal, a receive unit receiving said output FSK signal, said receive unit demodulating said FSK signal to provide a clock carrier and a control pulse, said control pulse is utilized to generate a receive reset pulse, said clock carrier which is phase-locked with said system clock frequency is utilized to provide a plurality of receive output signals upon the occurrence of said receive reset pulse, said plurality of receive output signals and said plurality of output signals in said sending unit being fully synchronized, and, a digital to analog converter unit receiving a plurality of digital input signals, said digital to analog converter unit sequentialy sampling said plurality of digital input signals and converting them into serial data, said serial data being applied to a sinusoidal oscillator with a first and second oscillating frequency, said sinusoidal oscillator providing an FSK output signal in response to said serial data.