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US4112358A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital frequency measuring device

Assignee: Advantest Corp
•
Filing: 1977-04-08
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Granted: 1978-09-05
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Expires: 1997-04-08
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Abstract

Abstract A digital frequency measuring device in which pulses of an input signal are counted for a certain period of time under the control of a gate signal and the count value is displayed in a digital form. A fraction detector circuit is provided for measuring the time interval or difference ΔT 1 between the leading edge of the gate signal and an input pulse arriving after it, the time interval or difference ΔT 2 between the trailing edge of the gate signal and an input pulse arriving after it and the unit period T of the input pulse signal, and performing an operation corresponding to (ΔT 1 - ΔT 2 /T. The result of operation is converted into the corresponding digital value, which is displayed as a fraction value of the abovesaid count value.

Inventors

  • 👤 Hitoshi Ashida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 12:13
CPC Classifications
G; G04; G04F; G04F10/00; G04F10/10; G01; G01R; G01R23/00; G01R23/02; G01R23/10

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 180 words
A digital frequency measuring device comprising: a gate circuit supplied with an input pulse signal to be measured in frequency and controlled by a gate signal to be opened and closed; a gate signal forming circuit for generating and supplying the gate signal of unit time to the gate circuit; a counter supplied with the input pulse signal having passed through the gate circuit to count the input pulses; a fraction detector circuit supplied with the gate signal and the input pulse signal for performing an operation (ΔT 1 - ΔT 2 )/T where ΔT 1 and ΔT 2 are the time intervals between the leading and trailing edges of the gate signal and the input pulses respectively following them in predetermined relationships thereto, and T is the period of the input pulse signal; an A-D converter supplied with the result of operation from the fraction detector circuit to convert it into a digital value; and a display for displaying the output from the A-D converter as the count value of the counter and a number below its minimum unit.
Claim 2
Dependent Claim 180 words
A digital frequency measuring device comprising: a gate circuit supplied with an input pulse signal to be measured in frequency and controlled by a gate signal to be opened and closed; a gate signal forming circuit for generating and supplying the gate signal of unit time to the gate circuit; a counter supplied with the input pulse signal having passed through the gate circuit to count the input pulses; a fraction detector circuit supplied with the gate signal and the input pulse signal for performing an operation (ΔT 1 - ΔT 2 )/T where ΔT 1 and ΔT 2 are the time intervals between the leading and trailing edges of the gate signal and the input pulses respectively following them in predetermined relationships thereto, and T is the period of the input pulse signal; an A-D converter supplied with the result of operation from the fraction detector circuit to convert it into a digital value; and a display for displaying the output from the A-D converter as the count value of the counter and a number below its minimum unit.
Claim 3
Dependent Claim 56 words
A digital frequency measuring device according to claim 1, where the fraction detector circuit comprises three integrators for integrating certain values for the periods of time ΔT 1 , ΔT 2 and T to obtain voltages ΔV 1 , ΔV 2 and V, respectively, and adapted to perform an operation (ΔV 1 - ΔV 2 )/V.
Claim 4
Dependent Claim 119 words
A digital frequency measuring device according to claim 1, wherein the fraction detector circuit comprises three integrators for integrating certain values for the periods of time ΔT 1 , ΔT 2 and T to obtain voltages ΔV 1 , ΔV 2 and V, respectively, and a differential amplifier supplied with the voltages ΔV 1 and ΔV 2 to obtain a difference voltage ΔV 1 - ΔV 2 , and wherein the voltages V and ΔV 1 - ΔV 2 are applied to a digital voltmeter serving as the A-D converter to measure the voltage ΔV 1 - ΔV 2 using the voltage V as the reference voltage, the digital value of the measured voltage being applied to the display.
Claim 5
Dependent Claim 137 words
A digital frequency measuring device according to claim 1, wherein the fraction detector circuit includes a D type flip-flop circuit and first and second set-reset type flip-flop circuits; the input pulse signals are supplied to a clock terminal of the D type flip-flop circuit and reset terminals of the first and second set-reset type flip-flop circuits; the output from a control circuit is supplied to a data terminal of the D type flip-flop circuit; the control circuit is inverted by the output from the D-type flip-flop circuit to provide the voltage V at the output terminal of the D type flip-flop circuit; and the gate signal and its inverted signal are respectively applied to set terminals of the first and second set-reset flip-flop circuits to derive the voltages ΔV 1 and ΔV 2 at their output terminals.
Claim 6
Dependent Claim 76 words
A digital frequency measuring device according to claim 1, wherein there is provided a time width measuring circuit for generating a second gate signal of a duration to be measured, and wherein the second gate signal is applied to the gate circuit and the fraction detector circuit in place of the gate signal, and a reference clock pulse being applied to the gate circuit and the fraction detector circuit in place of the input pulse signal.

References Cited (Backward Citations)

US3638001A Cited
US3729677A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-09-04 1982-03-06 1982-09-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-09-04 1986-03-06 1986-09-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-09-04 1990-03-06 1990-09-05 $7700.00 Window Closed / Lapsed

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