Display panel with integral memory capability for each display element and addressing system

Claim 1

A display system comprising: (a) an X-Y display element array panel, in which X-Y row and column buses are disposed on a substrate insulated from each other for peripheral connection to drive signal means, and for interconnection of the display elements, (b) display elements defined between the X-Y row and column intersections with a display medium disposed between spaced-apart electrodes, with an integral thin film memory transistor connected at each display element to the row and column buses and to one display element electrode, (c) means for addressing an information potential to each floating gate of the memory transistor associated with each display element which information potential determines the conductance state for the memory transistor, which means provides a transistor turn on pulse signal applied via the selected Y bus to turn on the selected transistor if the selected transistor is not already biased on, and provides a simultaneous charge equalizing pulse signal applied via the X bus if the selected transistor is not already biased on, and wherein the information potential is thereafter applied as the sum of pulse signals applied on the selected X and Y bus for the selected display element to induce a corresponding information potential on the selected floating gate, (d) means for applying a selected periodic display drive potential to a common display element electrode, with the display medium disposed between the common display element electrode and the spaced apart individual display element electrodes which are connected to a contact of the respective memory transistor associated with the display element, and including means for connecting the selected X and Y buses at a selected display element to a common reference potential relative to the periodic display drive potential to permit actuation of the display medium when the stored information potential on the floating gate of the memory transistor biases the transistor on to control the amplitude and duty cycle of signal across the display element electrodes for actuating the display element.